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參數(shù)資料
| 型號： | DS8500-JND+ |
| 廠商： | Maxim Integrated Products |
| 文件頁數(shù)： | 3/7頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC MODEM HART SGL 3.6V 20-TQFN |
| 產(chǎn)品培訓(xùn)模塊： | Lead (SnPb) Finish for COTS Obsolescence Mitigation Program |
| 標(biāo)準(zhǔn)包裝： | 1 |
| 應(yīng)用： | HART 調(diào)制解調(diào)器 |
| 接口： | 串行 |
| 電源電壓： | 2.7 V ~ 3.6 V |
| 封裝/外殼： | 20-WQFN 裸露焊盤 |
| 供應(yīng)商設(shè)備封裝： | 20-TQFN-EP（5x5） |
| 包裝： | 管件 |
| 安裝類型： | 表面貼裝 |
| 產(chǎn)品目錄頁面： | 703 (CN2011-ZH PDF) |
HART Modem
Pin Description
PIN
NAME
FUNCTION
1, 2
DVDD
Digital Supply Voltage
3, 9, 16,
17, 18
DGND
Digital Ground
4
RST
Active-Low Reset, Digital Input/Output. This pin includes an internal pullup resistor and is driven low
as an output when an internal reset condition occurs.
5
OCD
Carrier Detect, Digital Output. A logic-high indicates a valid carrier detection on FSK_IN.
OCD = 1 when FSK_IN amplitude is greater than 120mVP-P.
OCD = 0 when FSK_IN amplitude is less than 80mVP-P.
6
RTS
Request to Send, Digital Input. When set high, the device is put into the demodulator mode. A logic-low
puts the device into modulator mode.
7
XTAL1
Crystal Pin or Input for External Clock at 3.6864MHz
8
XTAL2
Crystal Pin or Output of the Crystal Amplifier
10
XCEN
External Clock Enable, Digital Input. When set high, this pin allows the user to drive an external clock
signal through XTAL1. When in this mode, XTAL2 should be left unconnected. An external crystal must
be connected between XTAL1 and XTAL2 when set low.
11
AVDD
Analog Supply Voltage
12
FSK_OUT
FSK Out, Analog Output. Output of the modulator. Provides a phase-continuous, FSK-modulated output
signal (1200Hz and 2200Hz output frequencies) to the 4–20mA current loop interface circuit.
13
REF
Reference, Analog Output. The internal voltage reference is provided as output. This pin must be
connected to a 0.1μF capacitor.
14
FSK_IN
FSK In, Analog Input. Input for the FSK-modulated HART receive signal from the 4–20mA current loop
interface circuit.
15
AGND
Analog Ground
19
D_OUT
Digital Data Out, Digital Output. Output from the demodulator.
20
D_IN
Digital Data In, Digital Input. Input to the modulator.
—
EP
Exposed Pad. Should be connected to ground (DGND, AGND).
Block Diagram
DS8500
CRYSTAL
OSCILLATOR
CLOCK
GENERATOR
XTAL1
RST
AVDD
AGND
DGND
DVDD
POWER
MONITOR
XTAL2
Rx
DEMODULATOR
DIGITAL
FILTER
SAMPLE/HOLD
ADC
OCD
D_OUT
Tx
MODULATOR
RTS
D_IN
XCEN
FSK_IN
REF
DAC
FSK_OUT
VREF
1.23V
DS8500
Maxim Integrated
3
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