參數(shù)資料
型號(hào): DS80C410
英文描述: Network Microcontrollers with Ethernet and CAN
中文描述: 具有以太網(wǎng)和CAN接口的網(wǎng)絡(luò)微控制器
文件頁(yè)數(shù): 31/102頁(yè)
文件大?。?/td> 2637K
代理商: DS80C410
DS80C410/DS80C411 Network Microcontrollers with Ethernet and CAN
PIN DESCRIPTION
31 of 102
PIN
NAME
FUNCTION
70
V
CC1
+1.8V Core Supply Voltage
12, 36, 62,
87
13, 39, 63,
88
V
CC3
+3.3V I/O Supply Voltage
V
SS
Digital Circuit Ground
68
ALE
Address Latch Enable, Output.
When the
MUX
pin is low, this pin outputs a clock to latch the external address
LSB from the multiplexed address/data bus on Port 0. This signal is commonly connected to the latch enable of
an external transparent latch. ALE has a pulse width of 1.5 XTAL1 cycles and a period of four XTAL1 cycles.
When the
MUX
pin is high, the pin toggles continuously if the ALEOFF bit is cleared. ALE is forced high when
the device is in a reset condition or if the ALEOFF bit is set while the
MUX
pin is high.
Program Store Enable, Output.
This signal is the chip enable for external program or merged program/data
memory.
PSEN
provides an active-low pulse and is driven high when external memory is not being accessed.
External Access Enable, Input.
Connect to GND to use external program memory. Connect to V
CC
to use
internal ROM.
Multiplex/Demultiplex Select, Input.
This pin selects if the address/data bus operates in multiplexed (
MUX
=
0) or demultiplexed (
MUX
= 1) mode. The
MUX
pin is sampled only on a power-on reset.
Reset, Input.
The RST input pin contains a Schmitt voltage input to recognize external active-high reset inputs.
The pin also employs an internal pulldown resistor to allow for a combination of wired-OR external-reset
sources. An RC circuit is not required for power-up, as the device provides this function internally.
Reset Output Low, Output.
This active-low signal is asserted when the microcontroller has entered reset
through the RST pin; during crystal warm-up period following power-on or stop mode; during a watchdog timer
reset; during an oscillator failure (if OFDE = 1); whenever V
CC1
V
RST1
or V
CC3
V
RST3
.
XTAL1, XTAL2.
Crystal oscillator pins support fundamental mode, parallel resonant, AT cut crystals. XTAL1 is
the input if an external clock source is used in place of a crystal. XTAL2 is the output of the crystal amplifier.
AD0–7 (Port 0), I/O.
When the
MUX
pin is connected low, Port 0 is the multiplexed address/data bus. While
ALE is high, the LSB of a memory address is presented. While ALE falls, the port transitions to a bidirectional
data bus. When the
MUX
pin is connected high, Port 0 functions as the bidirectional data bus. Port 0 cannot be
modified by software. The reset condition of Port 0 pins is high. No pullup resistors are needed.
67
PSEN
69
EA
40
MUX
97
RST
98
RSTOL
37
38
XTAL2
XTAL1
86
AD0/D0
85
AD1/D1
84
AD2/D2
83
AD3/D3
82
AD4/D4
81
AD5/D5
80
AD6/D6
79
AD7/D7
Port
P0.0
P0.1
P0.2
P0.3
P0.4
P0.5
P0.6
P0.7
Alternate Function
AD0/D0 (Address)/Data 0
AD1/D1 (Address)/Data 1
AD2/D2 (Address)/Data 2
AD3/D3 (Address)/Data 3
AD4/D4 (Address)/Data 4
AD5/D5 (Address)/Data 5
AD6/D6 (Address)/Data 6
AD7/D7 (Address)/Data 7
89
P1.0
90
P1.1
91
P1.2
92
P1.3
93
P1.4
94
P1.5
95
P1.6
96
P1.7
Port 1, I/O.
Port 1 can function as either an 8-bit, bidirectional I/O port or as an alternate interface for internal
resources. The reset condition of Port 1 is all bits at logic 1 through a weak pullup. The logic 1 state also serves
as an input mode, since external circuits writing to the port can override the weak pullup. When software clears
any port pin to 0, a strong pulldown is activated that remains on until either a 1 is written to the port pin or a
reset occurs. Writing a 1 after the port has been at 0 activates a strong transition driver, followed by a weaker
sustaining pullup. Once the momentary strong driver turns off, the port once again becomes the output (and
input) high state.
Port
Alternate Function
P1.0
T2 External I/O for Timer/Counter 2
P1.1
T2EX Timer/Counter 2 Capture/Reload Trigger
P1.2
RXD1 Serial Port 1 Receive
P1.3
TXD1 Serial Port 1 Transmit
P1.4
INT2 External Interrupt 2 (Positive Edge Detect)
P1.5
INT3
External Interrupt 3 (Negative Edge Detect)
P1.6
INT4 External Interrupt 4 (Positive Edge Detect)
P1.7
INT5
External Interrupt 5 (Negative Edge Detect)
66
A8
65
A9
64
A10
61
A11
60
A12
59
A13
A15–A8 (Port 2), Output.
Port 2 serves as the MSB for external addressing. The port automatically asserts the
address MSB during external ROM and RAM access. Although the Port 2 SFR exists, the SFR value never
appears on the pins (due to memory access). Therefore, accessing the Port 2 SFR is only useful for MOVX A,
@Ri or MOVX @Ri, A instructions, which use the Port 2 SFR as the external address MSB.
Port
Alternate Function
P2.0
A8 Program/Data Memory Address 8
P2.1
A9 Program/Data Memory Address 9
P2.2
A10 Program/Data Memory Address 10
P2.3
A11 Program/Data Memory Address 11
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DS80C410_09 制造商:MAXIM 制造商全稱:Maxim Integrated Products 功能描述:Network Microcontrollers with Ethernet and CAN
DS80C410-FNY 功能描述:8位微控制器 -MCU Network MCU w/Ethernet & CAN RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數(shù)據(jù)總線寬度:8 bit 最大時(shí)鐘頻率:50 MHz 程序存儲(chǔ)器大小:16 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風(fēng)格:SMD/SMT
DS80C410-FNY+ 功能描述:8位微控制器 -MCU Network MCU w/Ethernet & CAN RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數(shù)據(jù)總線寬度:8 bit 最大時(shí)鐘頻率:50 MHz 程序存儲(chǔ)器大小:16 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風(fēng)格:SMD/SMT
DS80C411 制造商:MAXIM 制造商全稱:Maxim Integrated Products 功能描述:Network Microcontrollers with Ethernet and CAN
DS80C411-FNY 功能描述:8位微控制器 -MCU Network MCU w/Ethernet & CAN RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數(shù)據(jù)總線寬度:8 bit 最大時(shí)鐘頻率:50 MHz 程序存儲(chǔ)器大小:16 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風(fēng)格:SMD/SMT