Note: Bypass VDD
鍙冩暩璩囨枡
鍨嬭櫉锛� DS4830T+
寤犲晢锛� Maxim Integrated Products
鏂囦欢闋佹暩锛� 8/30闋�
鏂囦欢澶у皬锛� 0K
鎻忚堪锛� MCU 16B CTRL CALIBR MON 40-TQFN
鐢㈠搧鍩硅〒妯″锛� Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
妯欐簴鍖呰锛� 60
绯诲垪锛� MAXQ®
鏍稿績铏曠悊鍣細 RISC
鑺珨灏哄锛� 16-浣�
閫熷害锛� 10MHz
閫i€氭€э細 3 绶�锛孖²C锛孲PI
澶栧湇瑷倷锛� 娆犲妾㈡脯/寰╀綅锛孭OR锛孭WM锛學DT
杓稿叆/杓稿嚭鏁革細 31
绋嬪簭瀛樺劜鍣ㄥ閲忥細 64KB锛�32K x 16锛�
绋嬪簭瀛樺劜鍣ㄩ鍨嬶細 闁冨瓨
RAM 瀹归噺锛� 1K x 16
闆诲 - 闆绘簮 (Vcc/Vdd)锛� 3 V ~ 3.6 V
鏁告摎杞夋彌鍣細 A/D 18x13b锛孌/A 8x12b
鎸暕鍣ㄥ瀷锛� 鍏ч儴
宸ヤ綔婧害锛� -40°C ~ 85°C
灏佽/澶栨锛� 40-WFQFN 瑁搁湶鐒婄洡
鍖呰锛� 绠′欢
鍏跺畠鍚嶇ū锛� 90-4830T+000
DS4830
Optical Microcontroller
16
Maxim Integrated
Pin Description (continued)
Note: Bypass VDD, REG285, and REG18 each with a 1F X5R and 10nF capacitors to ground. All input-only pins and open-drain
outputs are high impedance after VDD exceeds VBO and prior to code execution. Pins configured as GPIO have a weak internal
pullup. See the Selectable Functions table for more information.
Selectable Functions
PIn
nAME
InPUT
STRUCTURE(S)
OUTPUT
STRUCTURE
POWER-On
STATE
SELECTABLE FUnCTIOnS
(FIRST COLUMn IS DEFAULT FUnCTIOn)
PORT
40
DACPW7
Digital
Push-Pull
55A Pullup
DAC7, FS
= REFINB
or Internal
Reference
PW7
鈥�
P2.7
鈥�
EP
Exposed Pad
(Connect to GND)
鈥�
GND
鈥�
FUnCTIOn nAME
DESCRIPTIOn
ADC-D[7:0][P/N]
Differential Inputs to ADC. Also used for external temperature sensors.
ADC-REFIN[A/B]
REFINA and REFINB Monitor Inputs to ADC
ADC-S[15:0]
Single-Ended Inputs to ADC
ADC-SH[P/N][1:0]
Sample/Hold Inputs 1 and 0
ADC-VDD
VDD Monitor Input to ADC
DAC[7:0]
Voltage DAC Outputs
MCL, MCS, MDIO
Maxim Proprietary 3-Wire Interface, MCL (Clock), MCS (Chip Select), MDIO (Data). Used to
control the MAX3798 family of high-speed laser drivers.
MSCL, MSDA
I2C Master Interface: MSCL (I2C Master Slave), MSDA (I2C Master Data)
MSPICK, MSPICS, MSPIDI,
MSPIDO
SPI Master Interface: MSPICK (Clock), MSPICS (Active-Low Chip Select), MSPIDI (Data In),
MSPIDO (Data Out)
P0.n, P1.n, P2.n, P6.n
General-Purpose Inputs/Outputs. Can also function as interrupts.
PW[9:0]
PWM Outputs
RST
Used by JTAG and as Active-Low Reset for Device
SCL, SDA
I2C Slave Interface: SCL (I2C Slave Clock), SDA (I2C Slave Data). These also function as a
password-protected programming interface.
SHEN[1:0]
Sample/Hold Enable Inputs. Can also function as interrupts.
SSPICK, SSPICS, SSPIDI,
SSPIDO
SPI Slave Interface: SSPICK (Clock), SSPICS (Active-Low Chip Select), SSPIDI (Data In), SSPIDO
(Data Out). In SPI slave mode, the I2C slave interface is disabled.
TCK, TDI, TDO, TMS
JTAG Interface Pins. Also includes RST.
鐩搁棞PDF璩囨枡
PDF鎻忚堪
DS5000FP-16 IC MODULE MICRO 16MHZ FLATPACK
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鍙冩暩鎻忚堪
DS4830T+ 鍔熻兘鎻忚堪:16浣嶅井鎺у埗鍣� - MCU Control Calibration & Opt Trans Mtr RoHS:鍚� 鍒堕€犲晢:Texas Instruments 鏍稿績:RISC 铏曠悊鍣ㄧ郴鍒�:MSP430FR572x 鏁告摎绺界窔瀵害:16 bit 鏈€澶ф檪閻橀牷鐜�:24 MHz 绋嬪簭瀛樺劜鍣ㄥぇ灏�:8 KB 鏁告摎 RAM 澶у皬:1 KB 鐗囦笂 ADC:Yes 宸ヤ綔闆绘簮闆诲:2 V to 3.6 V 宸ヤ綔婧害鑼冨湇:- 40 C to + 85 C 灏佽 / 绠遍珨:VQFN-40 瀹夎棰ㄦ牸:SMD/SMT
DS4830T+T 鍔熻兘鎻忚堪:16浣嶅井鎺у埗鍣� - MCU Control Calibration & Opt Trans Mtr RoHS:鍚� 鍒堕€犲晢:Texas Instruments 鏍稿績:RISC 铏曠悊鍣ㄧ郴鍒�:MSP430FR572x 鏁告摎绺界窔瀵害:16 bit 鏈€澶ф檪閻橀牷鐜�:24 MHz 绋嬪簭瀛樺劜鍣ㄥぇ灏�:8 KB 鏁告摎 RAM 澶у皬:1 KB 鐗囦笂 ADC:Yes 宸ヤ綔闆绘簮闆诲:2 V to 3.6 V 宸ヤ綔婧害鑼冨湇:- 40 C to + 85 C 灏佽 / 绠遍珨:VQFN-40 瀹夎棰ㄦ牸:SMD/SMT
DS485 鍒堕€犲晢:NSC 鍒堕€犲晢鍏ㄧū:National Semiconductor 鍔熻兘鎻忚堪:Low Power RS-485/RS-422 Multipoint Transceiver
DS485M 鍔熻兘鎻忚堪:RS-422/RS-485 鎺ュ彛 IC RoHS:鍚� 鍒堕€犲晢:Maxim Integrated 鏁告摎閫熺巼:1136 Kbps 宸ヤ綔闆绘簮闆诲:3 V to 5.5 V 闆绘簮闆绘祦:5.9 mA 宸ヤ綔婧害鑼冨湇:- 40 C to + 85 C 瀹夎棰ㄦ牸:SMD/SMT 灏佽 / 绠遍珨:SOIC-28 灏佽:Tube
DS485M 鍒堕€犲晢:Texas Instruments 鍔熻兘鎻忚堪:RS485/422 LOW POWER TRNSCVR SOIC8