
DS3908
Dual, 64-Position Nonvolatile Digital
Potentiometer with Buffered Outputs
6
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POT0
H0
V0
L0
H1
V1
L1
I2C
INTERFACE
SDA
SCL
A0
A1
A2
WP
GND
VCC
DS3908
PGA0
POT1
PGA1
VCC
RWP
1x, 2x, 4x GAIN
F8h
F9h
FAh
FBh
G1
G0
EEPROM
1x, 2x, 4x GAIN
POT0 REGISTER
POT1 REGISTER
POT0/1 REGISTER
Functional Diagram
Detailed Description
The DS3908 contains two nonvolatile digital poten-
tiometers with programmable-gain amplifiers buffering
the wiper outputs.
The potentiometers have 63 equally weighted (linear-
taper) resistive elements, for a total of 64 taps. The
resistive elements are built using a low-temperature-
drift material, and have a typical 100k
end-to-end
resistance. This produces an output that is highly lin-
ear, with the highest and lowest taps connected to high
(Hx) and low (Lx) terminals, respectively. The poten-
tiometers are independently controlled using an I2C-
compatible interface. Three address pins allow one of
eight slave addresses to be selected. The eight slave
addresses allow the DS3908 address to be customized
for applications with multiple I2C devices, and allow up
to eight DS3908s to be placed on the same I2C bus.
The potentiometer positions are saved in EEPROM, and
are recalled during each power-up to provide non-
volatile position settings. Once the settings are written,
the write-protect pin prevents accidental writes to the
potentiometers. The write-protection function is ideal for
analog factory calibration because it prevents errant
transactions on the I2C bus from corrupting the settings
of the device. The WP pin contains an internal pullup
resistor that must be pulled low to write to the device.
The programmable-gain amplifiers can be indepen-
dently set to one of three different gains—1V/V, 2V/V, or
4V/V. The amplifiers’ common-mode input range is from
ground to 1.5V below VCC, and the output is rail-to-rail
and capable of driving 1mA loads, 300mV from each
supply rail. The outputs are stable driving 100pF loads
for applications that require output filtering.
The addition of the amplifier to buffer the potentiometer
wiper offers distinct advantages over standard digital
potentiometers. The buffer provides a high-impedance
load for the potentiometer and a low-impedance volt-
age output. This improves the linearity of the output
voltage for systems that load the potentiometer by elim-
inating the changes in current through both the poten-
tiometer and the wiper impedance. It also allows
voltage gain from the potentiometer input to the output.
Because the amplifiers are integrated into the DS3908,
this is done without increasing the footprint of the
design or the complexity of the PC board.