參數(shù)資料
型號: DS3906U+T&R
廠商: Maxim Integrated Products
文件頁數(shù): 8/14頁
文件大?。?/td> 0K
描述: IC RESIST VAR TRPL 10USOP
產(chǎn)品培訓(xùn)模塊: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
標(biāo)準(zhǔn)包裝: 3,000
接片: 64
電阻(歐姆): 1.45k,2.54k,2.54k
電路數(shù): 3
溫度系數(shù): 標(biāo)準(zhǔn)值 60 ppm/°C
存儲器類型: 非易失
接口: I²C(設(shè)備位址)
電源電壓: 2.7 V ~ 5.5 V
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 10-TFSOP,10-MSOP(0.118",3.00mm 寬)
供應(yīng)商設(shè)備封裝: 10-µMAX
包裝: 帶卷 (TR)
DS3906
Triple NV Low Step Size Variable
Resistor Plus Memory
_____________________________________________________________________
3
NONVOLATILE MEMORY CHARACTERISTICS
(VCC = +2.7V to 5.5V)
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
EEPROM Writes
0°C to +70°C. The room temperature
specification is at least 4x better than
specification over 0°C to +70°C.
50,000
AC ELECTRICAL CHARACTERISTICS (See Figure 2)
(VCC = +2.7V to 5.5V, TA = -40°C to +85°C, unless otherwise noted. Timing referenced to VIL(MAX) and VIH(MIN).)
Note 1: All voltages referenced to ground.
Note 2: ISTBY is specified with SDA = SCL = VCC, resistor pins floating, and inputs tied to VCC or GND.
Note 3: The DS3906 will not obstruct the SDA and SCL lines if VCC is switched off as long as the voltages applied to these input do
not violate their minimum and maximum input voltage levels.
Note 4: Tested with external resistor of 87
for R0 and R1 and 258 for R2 at 25°C.
Note 5: Timing shown is for fast mode (400kHz) operation. This device is also backward compatible with I
2C standard mode timing.
Note 6: CB
total capacitance of one bus line in picofarads.
Note 7: The EEPROM write time begins after a stop condition occurs.
Note 8: Guaranteed by design.
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
SCL Clock Frequency
fSCL
(Note 5)
0
400
kHz
Bus Free Time Between Stop and
Start Conditions
tBUF
1.3
s
Hold Time (Repeated) Start
Condition
tHD:STA
0.6
s
Low Period of SCL
tLOW
1.3
s
High Period of SCL
tHIGH
0.6
s
Data Hold Time
tHD:DAT
0
0.9
s
Data Set-up Time
tSU:DAT
100
ns
Start Set-up time
tSU:STA
0.6
s
SDA and SCL Rise Time
tR
(Note 6)
20 +
0.1CB
300
ns
SDA and SCL Fall Time
tF
(Note 6)
20 +
0.1CB
300
ns
Stop Set-up Time
tSU:STO
0.6
s
SDA and SCL Capacitive
Loading
CB
(Note 6)
400
pF
EEPROM Write Time
tWR
(Note 7)
20
ms
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