- 鎮ㄧ従(xi脿n)鍦ㄧ殑浣嶇疆锛�璨疯常IC缍�(w菐ng) > PDF鐩寗9658 > DS3896MX (National Semiconductor)IC TXRX BTL TRAPEZIODAL 20-SOIC PDF璩囨枡涓嬭級
鍙冩暩(sh霉)璩囨枡
| 鍨嬭櫉锛� | DS3896MX |
| 寤犲晢锛� | National Semiconductor |
| 鏂囦欢闋佹暩(sh霉)锛� | 8/10闋� |
| 鏂囦欢澶�?銆�?/td> | 0K |
| 鎻忚堪锛� | IC TXRX BTL TRAPEZIODAL 20-SOIC |
| 妯欐簴鍖呰锛� | 1,000 |
| 椤炲瀷锛� | 鏀剁櫦(f膩)鍣� |
| 椹�(q奴)鍕曞櫒/鎺ユ敹鍣ㄦ暩(sh霉)锛� | 8/8 |
| 闆绘簮闆诲锛� | 4.75 V ~ 5.25 V |
| 瀹夎椤炲瀷锛� | 琛ㄩ潰璨艰 |
| 灏佽/澶栨锛� | 20-SOIC锛�0.295"锛�7.50mm 瀵級 |
| 渚涙噳(y墨ng)鍟嗚ō(sh猫)鍌欏皝瑁濓細 | 20-SOIC |
| 鍖呰锛� | 甯跺嵎 (TR) |
| 鍏跺畠鍚嶇ū锛� | *DS3896MX |
OBSOLETE
SNOSBX0D 鈥� JANUARY 1996 鈥� REVISED FEBRUARY 2013
Note: tr = tf 鈮� 5 ns from 10% to 90%
Figure 7. Propagation Delay from T/R pin to An or Bn
Note: tr = tf = 2 ns from 10% to 90%
Figure 8. Receiver Noise Immunity: 鈥淣o Response at Output鈥� Input Waveforms
Note: tr = tf 鈮� 5 ns from 10% to 90%
Figure 9. Driver Plus Receiver Delays
Copyright 1996鈥�2013, Texas Instruments Incorporated
7
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鍙冩暩(sh霉)鎻忚堪 |
|---|---|
| DS3896N | 鍔熻兘鎻忚堪:IC TXRX BTL TRAPEZIODAL 8-DIP RoHS:鍚� 椤炲垾:闆嗘垚闆昏矾 (IC) >> 鎺ュ彛 - 椹�(q奴)鍕曞櫒锛屾帴鏀跺櫒锛屾敹鐧�(f膩)鍣� 绯诲垪:- 妯欐簴鍖呰:1,000 绯诲垪:- 椤炲瀷:鏀剁櫦(f膩)鍣� 椹�(q奴)鍕曞櫒/鎺ユ敹鍣ㄦ暩(sh霉):2/2 瑕�(gu墨)绋�:RS232 闆绘簮闆诲:3 V ~ 5.5 V 瀹夎椤炲瀷:琛ㄩ潰璨艰 灏佽/澶栨:16-SOIC锛�0.295"锛�7.50mm 瀵級 渚涙噳(y墨ng)鍟嗚ō(sh猫)鍌欏皝瑁�:16-SOIC 鍖呰:甯跺嵎 (TR) |
| DS3896N/A+ | 鍒堕€犲晢:鏈煡寤犲 鍒堕€犲晢鍏ㄧū:鏈煡寤犲 鍔熻兘鎻忚堪:Single 8-Bit Inverting Bus Transceiver |
| DS3896N/B+ | 鍒堕€犲晢:鏈煡寤犲 鍒堕€犲晢鍏ㄧū:鏈煡寤犲 鍔熻兘鎻忚堪:Single 8-Bit Inverting Bus Transceiver |
| DS3897 | 鍒堕€犲晢:NSC 鍒堕€犲晢鍏ㄧū:National Semiconductor 鍔熻兘鎻忚堪:BTL Trapezoidal鈶� Transceivers |
| DS3897J | 鍒堕€犲晢:鏈煡寤犲 鍒堕€犲晢鍏ㄧū:鏈煡寤犲 鍔熻兘鎻忚堪:4-Bit Bus Transceiver |
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