High-Voltage, NV, I2C POT 6 _____________________________________________" />
鍙冩暩(sh霉)璩囨枡
鍨嬭櫉(h脿o)锛� DS3502U+
寤犲晢锛� Maxim Integrated Products
鏂囦欢闋�(y猫)鏁�(sh霉)锛� 8/11闋�(y猫)
鏂囦欢澶�?銆�?/td> 0K
鎻忚堪锛� IC POT DGTL NV 128TAP 10-MSOP
鐢�(ch菐n)鍝佸煿瑷�(x霉n)妯″锛� Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
妯�(bi膩o)婧�(zh菙n)鍖呰锛� 556
鎺ョ墖锛� 128
闆婚樆锛堟瓙濮嗭級锛� 10k
闆昏矾鏁�(sh霉)锛� 1
婧害绯绘暩(sh霉)锛� 妯�(bi膩o)婧�(zh菙n)鍊� ±4 ppm/°C
瀛樺劜(ch菙)鍣ㄩ鍨嬶細 闈炴槗澶�
鎺ュ彛锛� I²C锛堣ō(sh猫)鍌欎綅鍧€锛�
闆绘簮闆诲锛� 2.5 V ~ 5.5 V
宸ヤ綔婧害锛� -40°C ~ 100°C
瀹夎椤炲瀷锛� 琛ㄩ潰璨艰
灏佽/澶栨锛� 10-TFSOP锛�10-MSOP锛�0.118"锛�3.00mm 瀵級
渚涙噳(y墨ng)鍟嗚ō(sh猫)鍌欏皝瑁濓細 10-µMAX
鍖呰锛� 绠′欢
DS3502
High-Voltage, NV, I2C POT
6
_______________________________________________________________________________________
I2C
INTERFACE
WIPER
REGISTER/
INITIAL VALUE
REGISTER
(WR/IVR)
00h
VCC
SDA
A0
A1
CONTROL
LOGIC/
REGISTER
(02h)
RH
RL
V+
POS 7Fh
POS 00h
GND
SCL
MODE BIT
RW
DS3502
Simplified Functional Diagram
Detailed Description
The DS3502 contains a single potentiometer whose
wiper position is controlled by the value in the Wiper
Register (WR). The initial power-up value of the wiper
position is set by programming the Initial Value Register
(IVR). On power-up, the data stored in the IVR register
is loaded into the WR register, which sets the position
of the potentiometer鈥檚 wiper.
Control Register
The Control Register (CR) located in register 02h con-
tains the WR/IVR Address Mode bit (MODE bit). The
MODE bit determines how I2C data is written to the WR
and IVR data register as follows:
MODE = 0: I2C writes to memory address 00h write to
(CR = 00h) both WR and IVR.
I2C reads from address 00h read from WR.
MODE = 1: I2C writes to memory address 00h write to
(CR = 80h) WR.
I2C reads from address 00h read from WR.
Regardless of the setting of the MODE bit, all I2C reads
of address 00h return the contents of the WR register.
Setting MODE = 1 allows for quick writing of SRAM
without the added delay of writing to the associated
EEPROM register. The data that is stored in EEPROM
and SRAM remains unchanged if the MODE bit is tog-
gled. The volatile CR register powers up as 00h, set-
ting the device into MODE = 0.
Digital Potentiometer Output
The potentiometer consists of 127 resistors in series
connected between the RH and RL pins. Between each
resistance and at the two endpoints, RH and RL, solid-
state switches enable RW to be connected within the
resistive network. The wiper position and the output on
RW are decoded based on the value in WR. If RH, RL,
and RW are externally connected in a voltage-divider
configuration, then the voltage on RW can be easily
calculated using the following equation:
where WR is the wiper position in decimal (0鈥�127).
VV
WR
VV
RW
RL
RH
RL
=+
127
()
Table 1. Memory Map
REGISTER
NAME
ADDRESS
(HEX)
FACTORY/POWER-UP DEFAULT
(HEX)
WR/IVR
Wiper Register/Initial Value Register
00
40
CR
Control Register
02
00 (Mode 0)
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