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參數(shù)資料
| 型號： | DS34T108GN |
| 廠商： | MAXIM INTEGRATED PRODUCTS INC |
| 元件分類： | 數(shù)字傳輸電路 |
| 英文描述： | Single/Dual/Quad/Octal TDM-Over-Packet Chip |
| 中文描述： | DATACOM, FRAMER, PBGA484 |
| 封裝： | 23 X 23 MM, HSBGA-484 |
| 文件頁數(shù)： | 1/74頁 |
| 文件大?。?/td> | 753K |
| 代理商： | DS34T108GN |
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Maxim Integrated Products
1
Some revisions of this device may incorporate deviations from published specifications known as errata. Multiple
revisions of any device may be simultaneously available through various sales channels. For information about
device errata, go to:
www.maxim-ic.com/errata
. For pricing, delivery, and ordering information, please contact Maxim
Direct at 1-888-629-4642, or visit Maxim’s website at www.maxim-ic.com.
DS 34T 101/DS 34T 102/DS 34T 104/DS 34T 108
S ingle/Dual/Quad/Oc tal T DM-Over-Packet Chip
General Desc ription
The IETF PWE
3
SAToP/CESoPSN/TDMoIP/HDLC
draft-compliant DS34T108 allows up to eight T1/E1
links or frame-based serial HDLC links to be
transported transparently through a switched IP or
MPLS packet network. Jitter and wander of
recovered clocks conform to G.823/G.824, G.8261,
and TDM specifications. This eliminates the need for
remote timing sources in cabinets and pedestals.
The Ethernet side of the DS34T108 provides high
QoS capabilities to its MII/RMII/SSMII port, while the
WAN side supports full-featured T1/E1 framers and
LIUs. This takes the solution all the way through
analog, while preserving options to make use of TDM
streams at key intermediate points. The high level of
integration that the DS34T108 brings minimizes cost,
board space, and time to market.
Applic ations
TDM Circuit Extension Over PSN
o
Leased—Line Services Over PSN
o
TDM Over G/E—PON
o
TDM Over Cable
o
TDM Over WiMAX
Cellular Backhaul Over PSN
Multiservice Over Unified PSN
HDLC—Based Traffic Transport Over PSN
Func tional Diagram
10/100
Ethernet
MAC
DS34T108
Bus
SDRAM
Interface
Circuit
Emulation
Engine
CLAD
Octal
T1/E1/J1
Transceiver
LIUs
Framers
Buffer
Manager
Clock Inputs
TDM
BERT
& CAS
xMII
Features
Full-Featured T1/E1/J1 LIU/Framer/TDM-Over-
Packet
Supports Adaptive Clock Recovery, Common
Clock (Using RTP), External Clock, and
Loopback Timing Modes
Selectable 32-Bit or 16-Bit Processor Bus
Clock Rate Adapter for T1/E1 Master Clock
10/100 Ethernet MAC That Supports
MII/RMII/SSMII
Fully Compatible with IEEE 802.3 Standard
VLAN Support According to 802.1 p&Q
Multiprotocol Encapsulation Supports IPv4,
IPv6, UDP, RTP, L2TPv3, MPLS, and Metro
Ethernet
End-to-End TDM Synchronization Through
the IP/MPLS Domain by Eight Independent
On-Chip TDM Clock Recovery Mechanisms
Single Serial Support for RS-530 and V.35
Single DS3/E3/STS-1 to Ethernet
Packet Loss Compensation and Handling of
Misordered Packets
64 Independent Bundle/Connections
Glueless SDRAM Buffer Management
1.8V Core, 3.3V I/O
Complies with IETF PWE3 RFCs and Drafts
for CESoPSN, SAToP, TDMoIP, and HDLC
Features continued in Section
7
.
Ordering Information
PART
PORTS
TEMP RANGE
PIN-
PACKAGE
484 HSBGA
484 HSBGA
484 TEBGA
484 TEBGA
484 TEBGA
484 TEBGA
484 TEBGA
484 TEBGA
DS34T108
GN
DS34T108GN+
DS34T104
GN*
DS34T104GN+*
DS34T102
GN*
DS34T102GN+*
DS34T101
GN*
DS34T101GN+*
+
Denotes a lead-free package.
*
Future product—Contact factory for availability.
8
8
4
4
2
2
1
1
-40
°
C to +85
°
C
-40
°
C to +85
°
C
-40
°
C to +85
°
C
-40
°
C to +85
°
C
-40
°
C to +85
°
C
-40
°
C to +85
°
C
-40
°
C to +85
°
C
-40
°
C to +85
°
C
Rev: 072707
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相關代理商/技術參數(shù) |
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| DS34T108GN+ | 功能描述:以太網 IC Octal TDM Over Packet Chip RoHS:否 制造商:Micrel 產品:Ethernet Switches 收發(fā)器數(shù)量:2 數(shù)據(jù)速率:10 Mb/s, 100 Mb/s 電源電壓-最大:1.25 V, 3.45 V 電源電壓-最小:1.15 V, 3.15 V 最大工作溫度:+ 85 C 封裝 / 箱體:QFN-64 封裝:Tray |
| DS35 | 制造商:LUMILEDS 制造商全稱:LUMILEDS 功能描述:power light source Luxeon Dental |
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| DS3500N+T&R | 制造商:Maxim Integrated Products 功能描述:- Tape and Reel |
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