
________________________________________________ DS33X162/X161/X82/X81/X42/X41/X11/W41/W11
Rev: 063008
229 of 375
Register Name:
AR.BMIS
Register Description:
Buffer Manager(Arbiter) Interrupt Status
Register Address:
1ACh
Bit 15
Bit 14
Bit 13
Bit 12
Bit 11
Bit 10
Bit 9
Bit 8
1ADh:
-
Default
0
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
1ACh:
-
EQOI
WQNFI
WQOI
LCNFI
LQOI
Default
0
Bit 4: Extract Queue Overflow Interrupt [EQOI] This bit provides an indication of whether this is an active
interrupt. This bit should not be latched, but should provide a logical OR of the Extract Queue Overflow Status
register bits (any “1” generates an interrupt).
0 = No active Interrupt
1 = Active Interrupt
Bit 3: WAN Queue Near Full Interrupt [WQNFI] This bit provides an indication of whether this is an active
interrupt. This bit should not be latched, but should provide a logical OR of the WAN Queue Near Full Status
register bits (any “1” generates an interrupt).
0 = No active Interrupt
1 = Active Interrupt
Bit 2: WAN Queue Overflow Interrupt [WQOI] This bit provides an indication of whether this is an active
interrupt. This bit should not be latched, but should provide a logical OR of the WAN Queue Overflow Status
register bits (any “1” generates an interrupt).
0 = No active Interrupt
1 = Active Interrupt
Bit 1: LAN Queue Near Full Interrupt [LQNFI] This bit provides an indication of whether this is an active
interrupt. This bit should not be latched, but should provide a logical OR of the LAN Queue Near Full Status
register bits (any “1” generates an interrupt).
0 = No active Interrupt
1 = Active Interrupt
Bit 0: LAN Queue Overflow Interrupt [LQOI] This bit provides an indication of whether this is an active
interrupt. This bit should not be latched, but should provide a logical OR of the LAN Queue Overflow Status register
bits (any “1” generates an interrupt).
0 = No active Interrupt
1 = Active Interrupt