參數(shù)資料
型號: DS3205
廠商: Maxim Integrated Products, Inc.
元件分類: 基準(zhǔn)電壓源/電流源
英文描述: Hot-Swappable Bus Buffer for I2C, SMBus, IPMI, and ATCA
中文描述: 熱插拔針對I2C總線緩沖器,帶有SMBus,IPMI的,和ATCA
文件頁數(shù): 1/20頁
文件大?。?/td> 255K
代理商: DS3205
Maxim Integrated Products
1
Some revisions of this device may incorporate deviations from published specifications known as errata. Multiple revisions of
any device may be simultaneously available through various sales channels. For information about device errata, go to:
www.maxim-ic.com/errata
. For pricing, delivery, and ordering information, please contact Maxim Direct at 1-888-629-4642, or
visit Maxim’s website at www.maxim-ic.com.
DS 3205
I
2
C, S MBus, IPMI, and ATCA
Hot-S wappable Bus Buffer for
General Desc ription
The DS3205 bus buffer enables hot insertion and
extraction of boards without corruption of the
backplane’s 2-wire bus (I
2
C, SMBus, IPMI, etc.).
When a board is inserted, the DS3205 presents high-
impedance SCL and SDA connections to the
backplane until V
DD
rises above 2.5V. During normal
operation,
the
DS3205
buffering to keep backplane and board capacitances
isolated.
provides
bidirectional
Rise-time accelerators on each 2-wire bus pin enable
the use of lower current pullup resistors while still
meeting rise-time requirements.
Applic ations
Hot-Swappable Boards for AdvancedTCA
,
CompactPCI
, VME, and Other Backplanes in
Chassis-Oriented Telecom, Datacom,
Computing, and Storage Systems
Capacitance Buffer
Bus Extender
Fault Isolator
Ordering Information
PART
TEMP RANGE
PIN-
PACKAGE
14 TDFN
PKG
CODE
T1433-1
DS3205DN+
-40
°
C to +85
°
C
+
Denotes a lead-free package.
Features
Compliant to PICMG 3.0 IPMI I
2
C Requirements
Bidirectional Buffer for SCL and SDA Lines
Compatible with I
2
C, I
2
C Fast Mode, SMBus,
IPMI, and ATCA
Standards (Up to 400kHz)
Prevents Corruption of System SCL and SDA
Lines During Live Insertion/Removal of Boards
Increases Fanout by Connecting Board Bus to
Backplane Bus with < 10pF Additional Load
Automatically Delays Initial Bus Connection
Until Both Bus Segments Are Idle
SCL and SDA Pins High-Z When V
DD
= 0V
1V Precharge on SCL and SDA Lines
ENABLE Input Pin Connects or Isolates Buses
READY Output Pin Indicates “Connected”
FAULT
Output Pin Indicates “Stuck Bus”
Optional Rise-Time Accelerators on All Bus
Pins
Configurable Rise-Time Accelerator Slew Rate
Threshold (0.8V/
μ
s or 1.25V/
μ
s)
Supports Clock Stretching and Multiple Bus
Master Arbitration and Synchronization
Optionally Disconnects Board from Backplane
When Bus is Stuck Low for
30ms
Optionally Attempts to Recover a Stuck Bus by
Clocking Board SCL
±
15kV ESD Protection (Human Body Model) on
Bus Pins
Wide Operating Voltage Range: 2.7V to 5.5V
5V Tolerant I/Os
Tiny 14-Pin, 3mm x 3mm TDFN Package
Rev: 111607
SMBus is a trademark of Intel Corp.
ATCA, AdvancedTCA, and CompactPCI are registered trademarks of PCI Industrial Computer Manufacturers Group (PICMG).
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參數(shù)描述
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