The framing modes are selected independently of the line interface modes usi" />
鍙冩暩(sh霉)璩囨枡
鍨嬭櫉(h脿o)锛� DS3183
寤犲晢锛� Maxim Integrated Products
鏂囦欢闋�(y猫)鏁�(sh霉)锛� 32/400闋�(y猫)
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鎻忚堪锛� IC TRPL ATM/PACKET PHY 400-PBGA
鐢�(ch菐n)鍝佸煿瑷�(x霉n)妯″锛� Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
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椤�(l猫i)鍨嬶細 瑾�(di脿o)骞€鍣�
鎳�(y墨ng)鐢細 鏁�(sh霉)鎿�(j霉)鍌宠几
瀹夎椤�(l猫i)鍨嬶細 琛ㄩ潰璨艰
灏佽/澶栨锛� 400-BBGA
渚涙噳(y墨ng)鍟嗚ō(sh猫)鍌欏皝瑁濓細 400-PBGA锛�27x27锛�
鍖呰锛� 绠′欢
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DS3181/DS3182/DS3183/DS3184
127
10.5.10 Framing Modes
The framing modes are selected independently of the line interface modes using the PORT.CR2.FM[5:0] control
bits. Different blocks are used in different framing modes. The bit error test (BERT) function can be enabled in any
mode. The LIU, JA and line encoder/decoder blocks are selected by the line mode (LM[2:0]) code.
The 鈥�- OHM鈥� mode, also known as 鈥渆xternally defined frame mode鈥�, is a mode that allow the use of the external
frame overhead bit mask pins TOHMIn, TOHMOn and ROHMIn. This mode allows external logic to select bit
locations where another level of framing can add overhead bits such as SONET/SDH overhead bits. Payload
loopback (PLB) is disabled in this mode. The 鈥淐lear-Channel鈥擮HM Octet aligned鈥� modes perform octet alignment
to the overhead mask for ATM and packets and the packets become octet stuffed instead of bit stuffed.
Table 10-32. Framing Mode Select Bits FM[5:0]
FM[5:0]
DESCRIPTION
LINE CODE
SYSTEM
FIGURE
0 00 000
DS3 C-bit
B3ZS/AMI/UNI
ATM/PKT
0 00 001
DS3 C-bit鈥擮HM
UNI
ATM/PKT
0 00 010
DS3 C-bit Internal Fractional
B3ZS/AMI/UNI
ATM/PKT
0 00 011
DS3 C-bit External Fractional
B3ZS/AMI/UNI
ATM/PKT
0 00 100
DS3 C-bit PLCP
B3ZS/AMI/UNI
ATM
0 00 101
DS3 C-bit PLCP鈥擮HM
UNI
ATM
0 00 110
DS3 C-bit Flexible Fractional
B3ZS/AMI/UNI
ATM/PKT
0 01 000
DS3 M23
B3ZS/AMI/UNI
ATM/PKT
0 01 001
DS3 M23鈥擮HM
UNI
ATM/PKT
0 01 010
DS3 M23 Internal Fractional
B3ZS/AMI/UNI
ATM/PKT
0 01 011
DS3 M23 External Fractional
B3ZS/AMI/UNI
ATM/PKT
0 01 100
DS3 M23 PLCP
B3ZS/AMI/UNI
ATM
0 01 101
DS3 M23 PLCP鈥擮HM
UNI
ATM
0 01 110
DS3 M23 Flexible Fractional
B3ZS/AMI/UNI
ATM/PKT
0 10 000
E3 G.751
HDB3/AMI/UNI
ATM/PKT
0 10 001
E3 G.751鈥擮HM
UNI
ATM/PKT
0 10 010
E3 G.751 Internal Fractional
HDB3/AMI/UNI
ATM/PKT
0 10 011
E3 G.751 External Fractional
HDB3/AMI/UNI
ATM/PKT
0 10 100
E3 G.751 PLCP
HDB3/AMI/UNI
ATM
0 10 101
E3 G.751 PLCP鈥擮HM
UNI
ATM
0 10 110
E3 G.751 Flexible Fractional
HDB3/AMI/UNI
ATM/PKT
0 11 000
E3 G.832
HDB3/AMI/UNI
ATM/PKT
0 11 001
E3 G.832鈥擮HM
UNI
ATM/PKT
0 11 010
E3 G.832 Internal Fractional
HDB3/AMI/UNI
ATM/PKT
0 11 011
E3 G.832 External Fractional
HDB3/AMI/UNI
ATM/PKT
0 11 100
Reserved
0 11 101
Reserved
0 11 110
E3 G.832 Flexible Fractional
HDB3/AMI/UNI
ATM/PKT
1 00 0X0
DS3 Clear Channel
B3ZS/AMI/UNI
ATM/PKT
1 00 001
DS3 Clear-Channel鈥擮HM
UNI
ATM/PKT
1 00 011
DS3 Clear-Channel鈥擮HM Octet aligned
UNI
ATM/PKT
1 01 0X0
STS-1 Clear Channel
B3ZS/AMI/UNI
ATM/PKT
1 01 001
STS-1 Clear-Channel鈥擮HM
UNI
ATM/PKT
1 01 011
STS-1 Clear-Channel鈥擮HM Octet aligned
UNI
ATM/PKT
1 1X 0X0
E3 Clear Channel
HDB3/AMI/UNI
ATM/PKT
1 1X 001
E3 Clear-Channel鈥擮HM
UNI
ATM/PKT
1 1X 011
E3 Clear-Channel鈥擮HM Octet aligned
UNI
ATM/PKT
鐩搁棞(gu膩n)PDF璩囨枡
PDF鎻忚堪
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DS3183N 鍔熻兘鎻忚堪:缍�(w菐ng)绲�(lu貌)鎺у埗鍣ㄨ垏铏曠悊鍣� IC Trpl ATM/Packet PHYs w/Built-In LIU RoHS:鍚� 鍒堕€犲晢:Micrel 鐢�(ch菐n)鍝�:Controller Area Network (CAN) 鏀剁櫦(f膩)鍣ㄦ暩(sh霉)閲�: 鏁�(sh霉)鎿�(j霉)閫熺巼: 闆绘簮闆绘祦锛堟渶澶у€硷級:595 mA 鏈€澶у伐浣滄韩搴�:+ 85 C 瀹夎棰�(f膿ng)鏍�:SMD/SMT 灏佽 / 绠遍珨:PBGA-400 灏佽:Tray
DS3184 鍔熻兘鎻忚堪:缍�(w菐ng)绲�(lu貌)鎺у埗鍣ㄨ垏铏曠悊鍣� IC Quad ATM/Packet PHYs w/Built-In LIU RoHS:鍚� 鍒堕€犲晢:Micrel 鐢�(ch菐n)鍝�:Controller Area Network (CAN) 鏀剁櫦(f膩)鍣ㄦ暩(sh霉)閲�: 鏁�(sh霉)鎿�(j霉)閫熺巼: 闆绘簮闆绘祦锛堟渶澶у€硷級:595 mA 鏈€澶у伐浣滄韩搴�:+ 85 C 瀹夎棰�(f膿ng)鏍�:SMD/SMT 灏佽 / 绠遍珨:PBGA-400 灏佽:Tray
DS3184+ 鍔熻兘鎻忚堪:缍�(w菐ng)绲�(lu貌)鎺у埗鍣ㄨ垏铏曠悊鍣� IC Quad ATM/Packet PHYs w/Built-In LIU RoHS:鍚� 鍒堕€犲晢:Micrel 鐢�(ch菐n)鍝�:Controller Area Network (CAN) 鏀剁櫦(f膩)鍣ㄦ暩(sh霉)閲�: 鏁�(sh霉)鎿�(j霉)閫熺巼: 闆绘簮闆绘祦锛堟渶澶у€硷級:595 mA 鏈€澶у伐浣滄韩搴�:+ 85 C 瀹夎棰�(f膿ng)鏍�:SMD/SMT 灏佽 / 绠遍珨:PBGA-400 灏佽:Tray
DS3184DK 鍔熻兘鎻忚堪:缍�(w菐ng)绲�(lu貌)闁�(k膩i)鐧�(f膩)宸ュ叿 RoHS:鍚� 鍒堕€犲晢:Rabbit Semiconductor 鐢�(ch菐n)鍝�:Development Kits 椤�(l猫i)鍨�:Ethernet to Wi-Fi Bridges 宸ュ叿鐢ㄤ簬瑭�(p铆ng)浼�:RCM6600W 鏁�(sh霉)鎿�(j霉)閫熺巼:20 Mbps, 40 Mbps 鎺ュ彛椤�(l猫i)鍨�:802.11 b/g, Ethernet 宸ヤ綔闆绘簮闆诲:3.3 V
DS3184N 鍔熻兘鎻忚堪:缍�(w菐ng)绲�(lu貌)鎺у埗鍣ㄨ垏铏曠悊鍣� IC Quad ATM/Packet PHYs w/Built-In LIU RoHS:鍚� 鍒堕€犲晢:Micrel 鐢�(ch菐n)鍝�:Controller Area Network (CAN) 鏀剁櫦(f膩)鍣ㄦ暩(sh霉)閲�: 鏁�(sh霉)鎿�(j霉)閫熺巼: 闆绘簮闆绘祦锛堟渶澶у€硷級:595 mA 鏈€澶у伐浣滄韩搴�:+ 85 C 瀹夎棰�(f膿ng)鏍�:SMD/SMT 灏佽 / 绠遍珨:PBGA-400 灏佽:Tray
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*鍨嬭櫉(h脿o) *鏁�(sh霉)閲� 寤犲晢 鎵硅櫉(h脿o) 灏佽
娣诲姞鏇村閲囪臣(g貌u)

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