參數(shù)資料
型號： DS26900LN+
廠商： Maxim Integrated Products
文件頁數(shù)： 48/49頁
文件大?。?/td> 0K
描述： IC JTAG MUX/SWITCH 144-LQFP
標準包裝： 90
系列： *
功能： *
電壓電源： 單電源
電壓 - 電源，單路/雙路(±)： 3.14 V ~ 3.47 V
電流 - 電源： *
工作溫度： *
安裝類型： 表面貼裝
封裝/外殼： 144-LQFP
供應商設備封裝： 144-LQFP（20x20）
包裝： 托盤
__________________________________________________________________________________________DS26900
8
NAME
PIN
TYPE
FUNCTION
TMS1
24
Ipd/O
Test Master 1 Test Port Test Mode Select
Master Mode = Input
Slave Mode = Output
When PREN = VDD, an internal 20k pulldown resistor is connected to this pin.
TMREQ1
19
Ipu
Test Master 1 Master Request (Active Low). (Internal 10k
Pullup) When EREQ is
inactive and
TMREQ1 is active, this pin selects the test master port 1 as the master.
When switching
TMREQ1, none of the master clocks should be toggling.
MGNT1
18
O
Master Grant 1 (Active Low). Asserted low when Test Master 1 is the arbitrated
master.
TCK2
30
Ipd/O
Test Master 2 Test Port Clock
Master Mode = Input
Slave Mode = Output
When PREN = VDD, an internal 20k pulldown resistor is connected to this pin.
TDI2
28
Ipu/O
Test Master 2 Test Port Serial Data Input
Master Mode = Input
Slave Mode = Output
When PREN = VDD, an internal 10k pullup resistor is connected to this pin.
TDO2
29
I/O
Test Master 2 Test Port Serial Data Out
Master Mode = Output
Slave Mode = Input
When PREN = VDD, an internal 10k pullup resistor is connected to this pin.
TRST2
31
Ipu/O
Test Master 2 Test Port Test Reset (Active Low). Asserting this pin low (when
master) puts the DS26900 into configuration mode, allowing access to the Switch
TAP Controller. Toggling
TRST2 when not the arbitrated master has no effect. This
pin does not directly affect secondary port resets.
Master Mode =
TRST2 Input
Slave Mode =
TRST2 Output
When PREN = VDD, an internal 10k pullup resistor is connected to this pin.
TMS2
32
Ipd/O
Test Master 2 Test Port Test Mode Select
Master Mode = Input
Slave Mode = Output
When PREN = VDD, an internal 20k pulldown resistor is connected to this pin.
TMREQ2
27
Ipu
Test Master 2 Master Request (Active Low) (Internal 10k
Pullup) When EREQ
and
TMREQ1 are inactive and TMREQ2 is active, this pin selects the test master
port 2 as the master. When switching
TMREQ2, none of the master clocks should be
toggling.
MGNT2
25
O
Master Grant 2 (Active Low). Asserted low when Test Master 2 is the arbitrated
master.
STCK1
91
O
Secondary Port 1 Test Clock
STDI1
92
O
Secondary Port 1 Serial Data In
STDO1
93
Ipu
Secondary Port 1 Serial Data Out (Internal 10k
Pullup)
STRST1
90
O
Secondary Port 1 Test Reset (Active Low)
STMS1
89
O
Secondary Port 1 Test Mode Select (Internal 20k
Pulldown)
STCK2
86
O
Secondary Port 2 Test Clock
STDI2
87
O
Secondary Port 2 Serial Data Input
STDO2
88
Ipu
Secondary port 2 Serial Data Out (Internal 10k
Pullup)
STRST2
85
O
Secondary Port 2 Test Reset (Active Low)
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相關代理商/技術參數(shù)
參數(shù)描述
DS26900LN+ 功能描述:多路器開關 IC JTAG MUX RoHS:否 制造商:Texas Instruments 通道數(shù)量:1 開關數(shù)量:4 開啟電阻（最大值）:7 Ohms 開啟時間（最大值）: 關閉時間（最大值）: 傳播延遲時間:0.25 ns 工作電源電壓:2.3 V to 3.6 V 工作電源電流: 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:UQFN-16
DS26900N+ 制造商:MAXIM 制造商全稱:Maxim Integrated Products 功能描述:JTAG Multiplexer/Switch
DS26C31 制造商:NSC 制造商全稱:National Semiconductor 功能描述:CMOS QUAD TRI-STATE DIFFERENTIAL LINE DRIVER
DS26C31 DIE 制造商:Texas Instruments 功能描述:
DS26C31_BBA3026X WAF 制造商:Texas Instruments 功能描述:
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