4.5 JTAG NAME TYPE FUNCTION JTCLK I JTAG Clock. This clock input is typically a low frequency (le" />
參數(shù)資料
型號: DS26502L+
廠商: Maxim Integrated Products
文件頁數(shù): 40/125頁
文件大小: 0K
描述: IC T1/E1/J1 64KCC ELEMENT 64LQFP
產(chǎn)品培訓(xùn)模塊: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
標(biāo)準(zhǔn)包裝: 160
類型: BITS 元件,多路復(fù)用器
PLL:
主要目的: T1/E1
輸入: 時鐘
輸出: 時鐘
電路數(shù): 1
比率 - 輸入:輸出: 2:3
差分 - 輸入:輸出: 無/無
頻率 - 最大: 6.312MHz
電源電壓: 3.135 V ~ 3.465 V
工作溫度: 0°C ~ 70°C
安裝類型: 表面貼裝
封裝/外殼: 64-LQFP
供應(yīng)商設(shè)備封裝: 64-LQFP(10x10)
包裝: 托盤
產(chǎn)品目錄頁面: 1430 (CN2011-ZH PDF)
DS26502 T1/E1/J1/64KCC BITS Element
21 of 125
4.5 JTAG
NAME
TYPE
FUNCTION
JTCLK
I
JTAG Clock. This clock input is typically a low frequency (less than 10MHz)
50% duty cycle clock signal.
JTMS
I
JTAG Mode Select (with Pullup). This input signal is used to control the
JTAG controller state machine and is sampled on the rising edge of JTCLK.
JTDI
I
JTAG Data Input (with Pullup). This input signal is used to input data into
the register that is enabled by the JTAG controller state machine and is sampled
on the rising edge of JTCLK.
JTDO
O
JTAG Data Output. This output signal is the output of an internal scan shift
register enabled by the JTAG controller state machine and is updated on the
falling edge of JTCLK. The pin is in the high-impedance mode when a register
is not selected or when the
JTRST signal is high. The pin goes into and exits the
high impedance mode after the falling edge of JTCLK
JTRST
I
JTAG Reset (Active Low). This input forces the JTAG controller logic into
the reset state and forces the JTDO pin into high impedance when low. This pin
should be low while power is applied and set high after the power is stable.
The pin can be driven high or low for normal operation, but must be high for
JTAG operation.
4.6 Line Interface
NAME
TYPE
FUNCTION
MCLK
I
Master Clock Input. A (50ppm) clock source. This clock is used internally for
both clock/data recovery and for the jitter attenuator for both T1 and E1 modes.
The clock rate can be 16.384MHz, 8.192MHz, 4.096MHz, or 2.048MHz. When
using the DS26502 in T1-only operation, a 1.544MHz (50ppm) clock source
can be used.
RTIP
I
Receive Tip. Analog input for clock recovery circuitry. This pin connects via a
1:1 transformer to the network. See the Line Interface Unit section for details.
RRING
I
Receive Ring. Analog input for clock recovery circuitry. This pin connects via
a 1:1 transformer to the network. See the Line Interface Unit section for details.
TTIP
O
Transmit Tip. Analog line-driver output. This pin connects via a 1:2 step-up
transformer to the network. See the Line Interface Unit section for details.
TRING
O
Transmit Ring. Analog line-driver output. This pin connects via a 1:2 step-up
transformer to the network. See the Line Interface Unit section for details.
THZE
I
Transmit High-Impedance Enable. When high, TTIP and TRING will be
placed into a high-impedance state.
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參數(shù)描述
DS26502L+ 功能描述:計時器和支持產(chǎn)品 E1/T1/J1/64Kcc Bits Element RoHS:否 制造商:Micrel 類型:Standard 封裝 / 箱體:SOT-23 內(nèi)部定時器數(shù)量:1 電源電壓-最大:18 V 電源電壓-最小:2.7 V 最大功率耗散: 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝:Reel
DS26502LB1 功能描述:計時器和支持產(chǎn)品 E1/T1/J1/64Kcc Bits Element RoHS:否 制造商:Micrel 類型:Standard 封裝 / 箱體:SOT-23 內(nèi)部定時器數(shù)量:1 電源電壓-最大:18 V 電源電壓-最小:2.7 V 最大功率耗散: 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝:Reel
DS26502LN 功能描述:計時器和支持產(chǎn)品 E1/T1/J1/64Kcc Bits Element RoHS:否 制造商:Micrel 類型:Standard 封裝 / 箱體:SOT-23 內(nèi)部定時器數(shù)量:1 電源電壓-最大:18 V 電源電壓-最小:2.7 V 最大功率耗散: 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝:Reel
DS26502LN+ 功能描述:計時器和支持產(chǎn)品 E1/T1/J1/64Kcc Bits Element RoHS:否 制造商:Micrel 類型:Standard 封裝 / 箱體:SOT-23 內(nèi)部定時器數(shù)量:1 電源電壓-最大:18 V 電源電壓-最小:2.7 V 最大功率耗散: 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝:Reel
DS26503 制造商:MAXIM 制造商全稱:Maxim Integrated Products 功能描述:T1/E1/J1/64KCC BITS Element