參數(shù)資料
型號(hào): DS26334GNA3+
廠商: Maxim Integrated Products
文件頁數(shù): 98/121頁
文件大小: 0K
描述: IC LIU E1/T1/J1 3.3V 256-CSBGA
產(chǎn)品培訓(xùn)模塊: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
標(biāo)準(zhǔn)包裝: 90
類型: 線路接口裝置(LIU)
驅(qū)動(dòng)器/接收器數(shù): 16/16
規(guī)程: IEEE 1149.1
電源電壓: 3.135 V ~ 3.465 V
安裝類型: 表面貼裝
封裝/外殼: 256-LBGA,CSBGA
供應(yīng)商設(shè)備封裝: 256-CSBGA(17x17)
包裝: 托盤
DS26334 3.3V, 16-Channel, E1/T1/J1 Short/Long-Haul Line Interface Unit
78 of 121
Register Name:
RSL4
Register Description:
Receive Signal Level Indicator 4 Register
Register Address (LIUs 1–8):
0Fh
Bit #
7
6
5
4
3
2
1
0
Name
C8RSL3
C8RSL2
C8RSL1
C8RSL0/
CALSTAT
C7RSL3
C7RSL2
C7RSL1
Default
C7RSL0
0
Bits 7 to 4: Channel 8 Receive Signal Level [3:0] (C8RSL[3:0]). C8RSL[3:0] bits provide the receive signal level
as shown in Table 6-17.
Bit 4: Channel 8 Receive Signal Level 0/Calibration Status (C8RSL0/CALSTAT). When CRIMP is high,
C8RSL0 will be replaced by a real-time status bit for the receive internal termination calibration circuit. If the bit is
low, this indicates that the calibration has not completed. If the bit is high, this indicates the calibration completed
successfully. Normally this bit should go high within 7
s of the low-to-high transition of the CRIMP bit. Receive
termination values will be updated subsequently.
Bits 3 to 0: Channel 7 Receive Signal Level [3:0] (C7RSL[3:0]). C7RSL[3:0] bits provide the receive signal level
as shown in Table 6-17.
Register Address (LIUs 9–16):
2Fh
Bit #
7
6
5
4
3
2
1
0
Name
C16RSL3
C16RSL2
C16RSL1
C16RSL0
C15RSL3
C15RSL2
C15RSL1
Default
C15RSL0
0
Bits 7 to 4: Channel 16 Receive Signal Level [3:0] (C16RSL[3:0]). C16RSL[3:0] bits provide the receive signal
level as shown in Table 6-17.
Bits 3 to 0: Channel 15 Receive Signal Level [3:0] (C15RSL[3:0]). C15RSL[3:0] bits provide the receive signal
level as shown in Table 6-17.
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