
DS2436
22 of 29
DS2436 COMMAND SET
Table 3
INSTRUCTION
DESCRIPTION
PROTOCOL
1-WIRE BUS
MASTER STATUS
AFTER ISSUING
PROTOCOL
1-WIRE BUS DATA
AFTER ISSUING
PROTOCOL
Read Scratchpad
Reads bytes from
DS2436 Scratchpad
Writes bytes to
DS2436
Scratchpad
Copies entire contents of
SP1 to NV1
11<addr
(00h-5Fh)>
17h<addr
00h-5Fh)>
RX
<read data>
Write Scratchpad
TX
<write data>
Copy SP1 to NV1
22h
Idle
{
NVB bit in Status
Register=1 until copy
complete(2-5 ms,typ)
}
{
NVB bit in Status
Register=1 until copy
complete(2-5 ms,typ)
}
Copy to SP2 to NV2
Copies entire contents of
SP2 to NV2
25h
Idle
Copy SP3 to SRAM
Copies entire contents
to SP3 to SRAM
Copies entire contents
of NV1 to SP1
Copies entire contents
to NV2 to SP2
Copies entire contents
of SRAM to SP3
Locks 24 bytes of SP1
and NV1 from writing
28h
Idle
Idle
Copy NV1 to SP1
71h
Idle
Idle
Copy NV2 to SP2
77h
Idle
Idle
Copy SRAM to SP3
7Ah
Idle
Idle
Lock NV1
43h
Idle
{
NVB bit in Status
Register=1 until lock
complete(2-5 ms,typ)
}
{
NVB bit in Status
Register=1 until
unlock complete(2-5
ms,typ)
}
Unlock NV1
Unlocks 24
bytes of SP1 and NV1
for writing
44h
Idle
Read Registers
Reads bytes from
Temperature, Voltage,
Status and ID Registers
B2<addr
(60h-63h,
77h-78h,
80h-83h)>
RX
<read data>
Reset Cycle Counter
Resets cycle counter
register to 0
B8h
Idle
{
NVB bit in Status
Register=1 until reset
complete(2-5 ms,typ)
}
{
NVB bit in Status
Register=1 until
increment complete(2-
5 ms,typ)
}
{
ADB bit in Status
Register = 1 until
conversion complete
}
{
TB bit in Status
Register = 1 until
conversion complete
}
Increment Cycle
Counter
Increments the value in
the cycle counter register
B5h
Idle
Convert V
Initiates battery voltage
A/D conversion
B4h
Idle
Convert T
Initiates temperature
conversion
D2h
Idle