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參數(shù)資料
| 型號： | DS2435 |
| 廠商： | DALLAS SEMICONDUCTOR |
| 元件分類： | Memory IC:Other |
| 英文描述： | SPECIALTY MEMORY CIRCUIT, PBCY3 |
| 封裝： | PR-35, 3 PIN |
| 文件頁數(shù)： | 9/24頁 |
| 文件大?。?/td> | 1190K |
| 代理商： | DS2435 |
DS2435
17 of 24
1-Wire BUS SYSTEM
The DS2435 1-Wire bus is a system, which has a single bus master and one slave. The DS2435 behaves
as a slave. The DS2435 is not able to be multidropped, unlike other 1-Wire devices from Dallas
Semiconductor.
The discussion of this bus system is broken down into three topics: hardware configuration, transaction
sequence, and 1-Wire signaling (signal types and timing).
HARDWARE CONFIGURATION
The 1-Wire bus has only a single line by definition; it is important that each device on the bus be able to
drive it at the appropriate time. To facilitate this, each device attached to the 1-Wire bus must have open
drain or 3-state outputs. The 1-Wire port of the DS2435 is open drain with an internal circuit equivalent
to that shown in Figure 6. The 1-Wire bus requires a pull-up resistor of approximately 5 k
.
The idle state for the 1-Wire bus is high. If for any reason a transaction needs to be suspended, the bus
MUST be left in the idle state if the transaction is to resume. If this does not occur and the bus is left low
for more than 480
s, all components on the bus will be reset.
TRANSACTION SEQUENCE
The protocol for accessing the DS2435 via the 1-Wire port is as follows:
Initialization
Memory Function Command
Transaction/Data
INITIALIZATION
All transactions on the 1-Wire bus begin with an initialization sequence. The initialization sequence
consists of a reset pulse transmitted by the bus master followed by presence pulse(s) transmitted by the
slave(s).
The presence pulse lets the bus master know that the DS2435 is on the bus and is ready to operate. For
more details, see the “I/O Signaling” section.
HARDWARE CONFIGURATION Figure 5
I/O SIGNALING
The DS2435 requires strict protocols to insure data integrity. The protocol consists of several types of
signaling on one line: reset pulse, presence pulse, write 0, write 1, read 0, and read 1. All of these signals,
with the exception of the presence pulse, are initiated by the bus master.
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| DS2436B | SPECIALTY MEMORY CIRCUIT, PBCY3 |
| DS2436Z | SPECIALTY MEMORY CIRCUIT, PDSO8 |
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相關(guān)代理商/技術(shù)參數(shù) |
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|---|---|
| DS2436 | 制造商:DALLAS 制造商全稱:Dallas Semiconductor 功能描述:Battery ID/Monitor Chip |
| DS2436_07 | 制造商:DALLAS 制造商全稱:Dallas Semiconductor 功能描述:Battery ID/Monitor Chip |
| DS2436B | 功能描述:電池管理 RoHS:否 制造商:Texas Instruments 電池類型:Li-Ion 輸出電壓:5 V 輸出電流:4.5 A 工作電源電壓:3.9 V to 17 V 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:VQFN-24 封裝:Reel |
| DS2436B/R | 制造商:DALLAS 制造商全稱:Dallas Semiconductor 功能描述:Battery ID/Monitor Chip |
| DS2436B/T | 制造商:DALLAS 制造商全稱:Dallas Semiconductor 功能描述:Battery ID/Monitor Chip |
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