參數(shù)資料
型號(hào)： DS2406P/T&R
廠商： Maxim Integrated Products
文件頁(yè)數(shù)： 19/32頁(yè)
文件大?。?/td> 0K
描述： IC SW DL ADDRESS W/1K MEM 6-TSOC
標(biāo)準(zhǔn)包裝： 4,000
應(yīng)用： 遙控，遙測(cè)
接口： 1 線
電源電壓： 2.8 V ~ 6 V
封裝/外殼： 6-LSOJ
供應(yīng)商設(shè)備封裝： 6-TSOC
包裝： 帶卷 (TR)
安裝類型： 表面貼裝
DS2406
26 of 32
PROGRAM PULSE TIMING DIAGRAM Figure 16
Resistor pull-up
LINE TYPE LEGEND:
Bus master active high
(12 V @ 10 mA)
V
PULLUP
V
PP
GND
480 s
t
RP
t
FP
t
DP
t
DV
> 5 s
t
PP
Normal 1-Wire
Communication Ends
Normal 1-Wire
Communication Resumes
CRC GENERATION
With the DS2406 there are two different types of CRCs (Cyclic Redundancy Checks). One CRC is an
8-bit type. It is computed at the factory and lasered into the most significant byte of the 64-bit ROM. The
equivalent polynomial function of this CRC is X
8
+ X
5
+ X
4
+ 1. To determine whether the ROM data has
been read without error the bus master can compute the CRC value from the first 56 bits of the 64-bit
ROM and compare it to the value read from the DS2406. This 8-bit CRC is received in the true form
(non-inverted) when reading the ROM.
The other CRC is a 16-bit type, generated according to the standardized CRC16-polynomial function X
16
+ X
15
+ X
2
+ 1. This CRC is used for error detection when reading Data Memory, Status Memory, or
when communicating with PIO channels. In contrast to the 8-bit CRC, the 16-bit CRC is always returned
in the complemented (inverted) form. A CRC-generator inside the DS2406 chip (Figure 17) will calculate
a new 16-bit CRC as shown in the command flow chart of Figure 7. The bus master may compare the
CRC value read from the device to the one it calculates from the data and decides whether to continue
with an operation or to re-do the function that returned the CRC error.
When reading the data memory of the DS2406 with the Read Memory command, the 16-bit CRC is only
transmitted at the end of the memory. This CRC is generated by clearing the CRC generator, shifting in
the command, low address, high address, and every data byte starting at the first addressed memory
location and continuing until the end of the physical data memory is reached.
When reading the Status Memory, the 16-bit CRC is transmitted at the end of the 8-byte Status Memory
page. The 16-bit CRC will be generated by clearing the CRC generator, shifting in the command byte,
low address, high address, and the data bytes beginning at the first addressed memory location and
continuing until the last byte of the Status Memory is reached.
When reading the data memory of the DS2406 with the Extended Read Memory command, there are two
situations where a 16-bit CRC is generated. One 16-bit CRC follows each Redirection Byte; another
16-bit CRC is transmitted after the last byte of a memory data page is read. The CRC at the end of the
memory page is always the result of clearing the CRC generator and shifting in the data bytes beginning
at the first addressed memory location of the EPROM data page until the last byte of this page. With the
initial pass through the Extended Read Memory flow chart the 16-bit CRC value is the result of shifting
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