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參數(shù)資料
| 型號(hào)： | DS2406 |
| 廠商： | MAXIM INTEGRATED PRODUCTS INC |
| 元件分類： | Programmable ROM |
| 英文描述： | 1K X 1 OTPROM, PBCY3 |
| 封裝： | TO-92, 3 PIN |
| 文件頁數(shù)： | 24/31頁 |
| 文件大?。?/td> | 356K |
| 代理商： | DS2406 |
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DS2406
PIO SINK CURRENT
10 mA
20 mA
30 mA
40 mA
50 mA
60 mA
70 mA
80 mA
90 mA
100 mA
I SA , I SB
@ 0.4V
VPUP
PIO-B
max.
min.
PIO-A
max.
min.
4V
5V
6V
2.8V
NOTES:
1. All voltages are referenced to ground.
2. VPUP, VPUPA, VPUPB = external pull-up voltage.
3. Input load is to ground.
4. An additional reset or communication sequence cannot begin until the reset high time has expired.
5. Read data setup time refers to the time the host must pull the 1-Wire bus low to read a bit. Data is
guaranteed to be valid within 1s of this falling edge and will remain valid for 14s minimum (15s
total from falling edge on 1-Wire bus).
6. VIH is a function of the chip-internal supply voltage. This voltage is determined by either the external
pull-up resistor and VPUP or the VCC supply, whichever is higher. Without VCC supply, VIH for either
PIO pin should always be greater than or equal to VPUP -0.3V.
7. Capacitance on the data pin could be 800pF when power is first applied. If a 5k
Ω resistor is used to
pull up the data line to VPUP, 5s after power has been applied the parasite capacitance will not affect
normal communications.
8. The Reset Low Time (tRSTL) should be restricted to a maximum of 960μs to allow interrupt signaling;
otherwise, it could mask or conceal interrupt pulses.
9. Input resistance is to ground.
10. VCC must be at least 4.0V if it is to be connected during a programming pulse.
11. If the current at PIO-A reaches 200mA the gate voltage of the output transistor will be reduced to
limit the sink current to 200mA. The user-supplied circuitry should limit the current flow through the
PIO-transistor to no more than 100mA. Otherwise the DS2406 may be damaged.
12. PIO-A has a controlled turn-on output. The indicated currents are DC values. At VPUP = 4.0V or
higher the sink current typically reaches 80% of its DC value 1 s after turning on the transistor.
13. Under certain low voltage conditions VILMAX may have to be reduced to as much as 0.5V to always
guarantee a presence pulse.
14. The accumulative duration of the programming pulses for each address must not exceed 5ms.
15. The optimal sampling point for the master is as close as possible to the end time of the 15
μs tRDV
period without exceeding tRDV. For the case of a Read-one time slot, this maximizes the amount of
time for the pull-up resistor to recover the line to a high level. For a Read-zero time slot it ensures
that a read will occur before the fastest 1-Wire devices(s) release the line (tRELEASE = 0).
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| DS2406/R | 制造商:DALLAS 制造商全稱:Dallas Semiconductor 功能描述:Dual Addressable Switch Plus 1kbit Memory |
| DS2406/T | 制造商:DALLAS 制造商全稱:Dallas Semiconductor 功能描述:Dual Addressable Switch Plus 1kbit Memory |
| DS2406/T&R | 功能描述:接口 - 專用 RoHS:否 制造商:Texas Instruments 產(chǎn)品類型:1080p60 Image Sensor Receiver 工作電源電壓:1.8 V 電源電流:89 mA 最大功率耗散: 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:BGA-59 |
| DS2406/TR | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Peripheral IC |
| DS2406_07 | 制造商:DALLAS 制造商全稱:Dallas Semiconductor 功能描述:Dual Addressable Switch Plus 1kbit Memory |
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