μs ≤ tSLOT
參數(shù)資料
型號: DS2405+
廠商: Maxim Integrated Products
文件頁數(shù): 5/15頁
文件大小: 0K
描述: IC SWITCH ADDRESS NCH O-D TO-92
產(chǎn)品培訓(xùn)模塊: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
標(biāo)準(zhǔn)包裝: 1
接口: 1 線
電源電壓: 2.8 V ~ 6 V
封裝/外殼: TO-226-3、TO-92-3 標(biāo)準(zhǔn)主體
供應(yīng)商設(shè)備封裝: TO-92-3
包裝: 管件
安裝類型: 通孔
DS2405
13 of 15
READ/WRITE TIMING DIAGRAM Figure 6 (cont.)
Read-Data Time Slot
60
μs ≤ tSLOT < 120μs
1
μs ≤ tLOWR< 15μs
0
≤ tRELEASE< 45μs
1
μs ≤ tREC< ∞
tRDV= 15μs
tSU < 1μs
CRC GENERATION
To validate the data transmitted from the DS2405, the bus master may generate a CRC value from the
data as it is received. This generated value is compared to the value stored in the last 8 bits of the
DS2405. If the two CRC values match, the transmission is error-free.
The equivalent polynomial function of this CRC is:
CRC = x8 + x5 + x4 + 1
For more details, see the Book of DS19xx iButton Standards.
RESISTOR
MASTER
DS2405
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