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DS2404
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Read Memory [F0h]
The read memory command may be used to read the entire memory. After issuing the command, the user
must provide the 2-byte target address. After the two bytes, the user reads data beginning from the target
address and may continue until the end of memory, at which point logic 1’s will be read. It is important to
realize that the target address registers will contain the address provided. The ending offset/data status
byte is unaffected.
The hardware of the DS2404 provides a means to accomplish error-free writing to the memory section.
To safeguard reading data in the 1-Wire environment and to simultaneously speed up data transfers, it is
recommended to packetize data into data packets of the size of one memory page each. Such a packet
would typically store a 16-bit CRC with each page of data to ensure rapid, error-free data transfers that
eliminate having to read a page multiple times to determine if the received data is correct or not. (See the
Book of DS19xx iButton Standards, Chapter 7 for the recommended file structure to be used with the 1-
Wire environment.)
MEMORY FUNCTION EXAMPLES
Example 1: Write one page of data to page 15
Read page 15 (3-wire port)
MASTER MODE
DATA(LSB FIRST)
COMMENTS
TX
Reset
Master pulses RST low
TX
0Fh
Issue “write scratchpad” command
TX
E0h
TA1, beginning offset=0
TX
01h
TA2, address=01E0h
TX
<32 data bytes>
Write 1 page of data to scratchpad
TX
Reset
Master pulses RST low
TX
AAh
Issue “read scratchpad” command
RX
E0h
Read TA1, beginning offset=0
RX
01h
Read TA2, address=01E0h
RX
1Fh
Read E/S, ending offset=31d, flags=0
RX
<32 data bytes>
Read scratchpad data and verify
TX
Reset
Master pulses RST low
TX
55h
Issue “copy scratchpad” command
TX
E0h
TX
01h
TX
1Fh
TA1
TA2
AUTHORIZATION CODE
E/S
RX
<busy indicator>
Wait until DQ=0 (~30
μs typical)
TX
Reset
Master pulses RST low
TX
F0h
Issue “read memory” command
TX
E0h
TA1, beginning offset=0
TX
01h
TA2, address=01E0h
RX
<32 data bytes>
Read memory page 15 and verify
TX
Reset
Master pulses RST low, done
NOTE: The ROM function commands do not apply to the 3-wire port. After RST is at a high level, the
device expects to receive a memory function command.