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參數(shù)資料
| 型號(hào)： | DS2401P+T&R |
| 廠商： | Maxim Integrated Products |
| 文件頁(yè)數(shù)： | 7/11頁(yè) |
| 文件大?。?/td> | 0K |
| 描述： | IC SILICON SERIAL NUMBER 6-TSOC |
| 產(chǎn)品培訓(xùn)模塊： | Lead (SnPb) Finish for COTS Obsolescence Mitigation Program |
| 標(biāo)準(zhǔn)包裝： | 1 |
| 類(lèi)型： | 硅序列號(hào) |
| 應(yīng)用： | PCB，網(wǎng)絡(luò)節(jié)點(diǎn)，設(shè)備識(shí)別/注冊(cè) |
| 安裝類(lèi)型： | 表面貼裝 |
| 封裝/外殼： | 6-LSOJ |
| 供應(yīng)商設(shè)備封裝： | 6-TSOC |
| 包裝： | 標(biāo)準(zhǔn)包裝 |
| 產(chǎn)品目錄頁(yè)面： | 1429 (CN2011-ZH PDF) |
| 其它名稱： | DS2401P+DKR |
DS2401
1-Wire SIGNALING
The DS2401 requires a strict protocol to ensure data integrity. The protocol consists of four types of
signaling on one line: reset sequence with Reset Pulse and Presence Pulse, write 0, write 1, and read data.
All these signals except Presence Pulse are initiated by the bus master.
The initialization sequence required to begin any communication with the DS2401 is shown in Figure 5.
A reset pulse followed by a Presence Pulse indicates the DS2401 is ready to send or receive data given
the correct ROM command.
The bus master transmits (TX ) a reset pulse (tRSTL , minimum 480s). The bus master then releases the
line and goes into receive mode (RX). The 1-Wire bus is pulled to a high state via the 5k pullup resistor.
After detecting the rising edge on the data pin, the DS2401 waits (tPDH, 15-60s) and then transmits the
Presence Pulse (tPDL, 60-240s). The 1-Wire bus requires a pullup resistor range of 1.5k to 5k,
depending on bus load characteristics.
READ/WRITE TIME SLOTS
The definitions of write and read time slots are illustrated in Figure 6. All time slots are initiated by the
master driving the data line low. The falling edge of the data line synchronizes the DS2401 to the master
by triggering a delay circuit in the DS2401. During write time slots, the delay circuit determines when the
DS2401 will sample the data line. For a read data time slot, if a “0” is to be transmitted, the delay circuit
determines how long the DS2401 will hold the data line low overriding the “1” generated by the master.
If the data bit is a 1, the DS2401 will leave the read data time slot unchanged.
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| DS2401P-Z02/T&R | 功能描述:序列號(hào)注冊(cè) RoHS:否 制造商:Maxim Integrated 數(shù)據(jù)總線寬度: 電源電壓-最大: 電源電壓-最小: 最大工作溫度: 最小工作溫度: 安裝風(fēng)格: 封裝 / 箱體: |
| DS2401-SL | 制造商:MAXIM 制造商全稱:Maxim Integrated Products 功能描述:Silicon Serial Number Unique, Factory-Lasered and Tested 64-Bit |
| DS2401-SL+T&R | 制造商:Maxim Integrated Products 功能描述:SER# TO92-TRL STRAIGHT LEADSLF - Tape and Reel 制造商:Maxim Integrated Products 功能描述:IC SILICON SERIAL NUMBER TO-92 制造商:Maxim Integrated Products 功能描述:Serial Number Registration Silicon Serial Number |
| DS2401-SL+T&R | 功能描述:序列號(hào)注冊(cè) Silicon Serial Number RoHS:否 制造商:Maxim Integrated 數(shù)據(jù)總線寬度: 電源電壓-最大: 電源電壓-最小: 最大工作溫度: 最小工作溫度: 安裝風(fēng)格: 封裝 / 箱體: |
| DS2401-SLT | 制造商:MAXIM 制造商全稱:Maxim Integrated Products 功能描述:Silicon Serial Number Unique, Factory-Lasered and Tested 64-Bit |
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