參數(shù)資料
型號(hào): DS232AE
廠商: DALLAS SEMICONDUCTOR
元件分類: Line Driver or Receiver
英文描述: LINE TRANSCEIVER, PDSO20
封裝: TSSOP-20
文件頁(yè)數(shù): 12/14頁(yè)
文件大小: 300K
代理商: DS232AE
MAX15018/MAX15019
125V/3A, High-Speed,
Half-Bridge MOSFET Drivers
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7
DELAY MATCHING (DH AND DL RISING)
MAX15018 toc18
10ns/div
VIN_
10V/div
VDH AND VDL
10V/div
CL = 0pF
RESPONSE TO VDD GLITCH
MAX15018 toc19
40
s/div
VDH_
VIN_
VDL
VDD
10V/div
Typical Operating Characteristics (continued)
(TA = +25°C, unless otherwise noted.)
_______________________________________________________________________________________
7
Pin Description
PIN
NAME
FUNCTION
1VDD
Input Supply Voltage. Valid supply voltage ranges from 8V to 12.6V. Bypass VDD to GND with a parallel
combination of 0.1F and 1F ceramic capacitors as close to the IC as possible.
2
BST
Boost Flying Capacitor Connection. Connect a 0.22F ceramic capacitor from BST to HS as close to the IC
as possible for the high-side MOSFET driver supply.
3
DH
High-Side Gate Driver Output. Driver output for the high-side MOSFET gate.
4
HS
Source Connection for High-Side MOSFET. Also serves as the return for the high-side driver.
5
IN_H
High-Side Noninverting Logic Input
6
IN_L
Low-Side Noninverting (MAX15018A/MAX15019A) or Low-Side Inverting (MAX15018B/MAX15019B) Input
7
GND
Ground. Use GND as a return path to the DL driver output and the IN_H, IN_L inputs. Must be connected to
ground.
8
DL
Low-Side Gate Driver Output. Driver output for the low-side MOSFET gate.
—EP
Exposed Pad. Internally connected to GND. Externally connect the exposed pad to a large ground plane to
aid in heat dissipation. Grounding EP does not substitute the requirement to connect GND to ground.
相關(guān)PDF資料
PDF描述
DS232AR LINE TRANSCEIVER, PDSO16
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DS232AS-N LINE TRANSCEIVER, PDSO16
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