參數(shù)資料
型號: DS229SN
元件分類: RS-232
英文描述: 5V High-Speed RS-232 Transceivers with 0.1uF Capacitors
中文描述: 5V的高速RS - 232收發(fā)器與0.1uF電容
文件頁數(shù): 8/9頁
文件大小: 100K
代理商: DS229SN
TCLK
TPOS, TNEG
LPOS, LNEG
t
SD
t
HD
t
P
DS2290
022798 8/9
ANALOG ELECTRICAL CHARACTERISTICS
(0
°
C to 70
°
C; V
DD
=5V
±
5%)
MAX
UNITS
PARAMETER
SYMBOL
MIN
TYP
NOTES
Input Impedance at RXTIP and
RXRING at 772 KHz
I
Z
95
100
105
ohms
1
Transmit Jitter Generation
J
GEN
0.03
UIpp
2
Transmit Pulse Amplitude
P
AMP
2.5
3.0
3.5
Vpk
3,4,5
Pulse Width Balance @ 50%
PW
BAL
1
10
ns
3,6
Pulse Amplitude Balance
PA
BAL
10
100
mV
3,6
Power Level at 772 KHz
P
LVL
12
19
dBm
7
NOTES:
1. RX+ and RX– left open circuited.
2. Jitter present at TXTIP and TXRING with no jitter at TCLK (LB=0) or LCLK (LB=1).
3. Measured with 100 ohm (
±
5%) termination at TXTIP and TXRING.
4. Measured directly at TXTIP and TXRING with 0 dB of line build out.
5. Pulse shape meets template in Figure 3 over temperature and voltage.
6. Measured over 17 consecutive pulses.
7. Measured in a 2 KHz to 3 KHz band about 772 KHz; power level in a 2 to 3 KHz band at 1.544 MHz is at least
25 dB lower.
DIGITAL ELECTRICAL CHARACTERISTICS
(0
°
C to 70
°
C; V
DD
=5V
±
5%)
MAX
UNITS
PARAMETER
SYMBOL
MIN
TYP
NOTES
TCLK Period
t
P
±
32
ppm
1
TPOS, TNEG or LPOS, LNEG
Setup Time to TCLK or LCLK
Falling
t
SD
50
ns
TPOS, TNEG or LPOS, LNEG
Hold Time from TCLK or LCLK
Falling
t
HD
50
ns
NOTE:
1. Necessary to meet current carrier and FCC specifications.
AC TIMING DIAGRAM
Figure 5
相關(guān)PDF資料
PDF描述
DS229 5V High-Speed RS-232 Transceivers with 0.1uF Capacitors
DS229E 5V High-Speed RS-232 Transceivers with 0.1uF Capacitors
DS229S 5V High-Speed RS-232 Transceivers with 0.1uF Capacitors
DS2291 Clock/Data Recovery
DS229EN 5V High-Speed RS-232 Transceivers with 0.1uF Capacitors
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