參數(shù)資料
型號(hào)： DS21Q59LN+
廠商： Maxim Integrated Products
文件頁(yè)數(shù)： 16/76頁(yè)
文件大?。?/td> 0K
描述： IC TXRX E1 QUAD 100-LQFP
產(chǎn)品培訓(xùn)模塊： Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
標(biāo)準(zhǔn)包裝： 90
類型： 收發(fā)器
驅(qū)動(dòng)器/接收器數(shù)： 4/4
規(guī)程： E1
電源電壓： 4.75 V ~ 5.25 V
安裝類型： 表面貼裝
封裝/外殼： 100-LQFP
供應(yīng)商設(shè)備封裝： 100-LQFP（14x14）
包裝： 托盤
DS21Q59 Quad E1 Transceiver
23 of 76
8.5 Local Loopback
When CCR4.6 is set to 1, the DS21Q59 is forced into local loopback (LLB) mode. In this loopback, data continues
to be transmitted as normal. Data being received at RTIP and RRING is replaced with the data being transmitted.
Data in this loopback passes through the jitter attenuator (Figure 3-1).
Register Name:
CCR4
Register Description:
Common Control Register 4
Register Address:
15 Hex
Bit #
7
6
5
4
3
2
1
0
Name
LIRST
RESA
RESR
RCM4
RCM3
RCM2
RCM1
RCM0
NAME
BIT
FUNCTION
LIRST
7
Line Interface Reset. Setting this bit from 0 to 1 initiates an internal reset
that affects the clock recovery state machine and jitter attenuator.
Normally this bit is only toggled on power-up. It must be cleared and set
again for a subsequent reset.
RESA
6
Receive Elastic Store Align. Setting this bit from 0 to 1 may force the
receive elastic store’s write/read pointers to a minimum separation of half
a frame. No action is taken if the pointer separation is already greater
than or equal to half a frame. If pointer separation is less than half a
frame, the command is executed and data is disrupted. This bit should be
toggled after SYSCLK has been applied and is stable. It must be cleared
and set again for a subsequent align. See Section 18 for details.
RESR
5
Receive Elastic Store Reset. Setting this bit from 0 to 1 forces the
receive elastic store to a depth of one frame. Receive data is lost during
the reset. The bit should be toggled after SYSCLK has been applied and
is stable. It must be cleared and set again for a subsequent reset. See
Section 18 for details.
RCM4
4
Receive Channel Monitor Bit 4. MSB of a channel decode that
determines which receive channel data appears in the RDS0M register.
See Section 10 for details.
RCM3
3
Receive Channel Monitor Bit 3
RCM2
2
Receive Channel Monitor Bit 2
RCM1
1
Receive Channel Monitor Bit 1
RCM0
0
Receive Channel Monitor Bit 0. LSB of the channel decode.
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參數(shù)描述
DS21Q59LN+ 功能描述:網(wǎng)絡(luò)控制器與處理器 IC Quad E1 Transceiver RoHS:否 制造商:Micrel 產(chǎn)品:Controller Area Network (CAN) 收發(fā)器數(shù)量: 數(shù)據(jù)速率: 電源電流（最大值）:595 mA 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:PBGA-400 封裝:Tray
DS21S07A 制造商:Maxim Integrated Products 功能描述:
DS21S07AE 功能描述:SCSI 接口集成電路 RoHS:否 制造商:Texas Instruments 工作電源電壓:2.7 V to 5.25 V 電源電流:13 mA 最大工作溫度:+ 70 C 最小工作溫度:0 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:SSOP-36 封裝:Tube
DS21S07AE/T 制造商:MAXIM 制造商全稱:Maxim Integrated Products 功能描述:SCSI Terminator
DS21S07AE/T&R 制造商:Rochester Electronics LLC 功能描述: 制造商:Maxim Integrated Products 功能描述: 制造商:Maxim Integrated Products 功能描述:IC TERMINATOR SCSI 20-TSSOP
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