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參數(shù)資料
| 型號： | DS21Q44T+ |
| 廠商： | Maxim Integrated Products |
| 文件頁數(shù)： | 74/105頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC FRAMER ENHANCED E1 4X 128TQFP |
| 標準包裝： | 72 |
| 控制器類型： | E1 調(diào)幀器 |
| 接口： | 并行/串行 |
| 電源電壓： | 2.97 V ~ 3.63 V |
| 電流 - 電源： | 75mA |
| 工作溫度： | 0°C ~ 70°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 128-LQFP |
| 供應商設(shè)備封裝： | 128-LQFP（14x20） |
| 包裝： | 管件 |
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DS21Q44
70 of 105
SYMBOL
POSITION
NAME AND DESCRIPTION
TDS0M
TDC1.5
DS0 Selection Mode.
0 = utilize the TD0 to TD4 bits to select which single DS0
channel to use.
1 = utilize the TCHBLK control registers to select which DS0
channels to use.
TD4
TDC1.4
DS0 Channel Select Bit 4. MSB of the DS0 channel select.
TD3
TDC1.3
DS0 Channel Select Bit 3.
TD2
TDC1.2
DS0 Channel Select Bit 2.
TD1
TDC1.1
DS0 Channel Select Bit 1.
TD0
TDC1.0
DS0 Channel Select Bit 0. LSB of the DS0 channel select.
TDC2: TRANSMIT HDLC DS0 CONTROL REGISTER 2 (Address = BB Hex)
(MSB)
(LSB)
TDB8
TDB7
TDB6
TDB5
TDB4
TDB3
TDB2
TDB1
SYMBOL
POSITION
NAME AND DESCRIPTION
TDB8
TDC2.7
DS0 Bit 8 Suppress Enable. MSB of the DS0. Set to one to
stop this bit from being used.
TDB7
TDC2.6
DS0 Bit 7 Suppress Enable. Set to one to stop this bit from
being used.
TDB6
TDC2.5
DS0 Bit 6 Suppress Enable. Set to one to stop this bit from
being used.
TDB5
TDC2.4
DS0 Bit 5 Suppress Enable. Set to one to stop this bit from
being used.
TDB4
TDC2.3
DS0 Bit 4 Suppress Enable. Set to one to stop this bit from
being used.
TDB3
TDC2.2
DS0 Bit 3 Suppress Enable. Set to one to stop this bit from
being used.
TDB2
TDC2.1
DS0 Bit 2 Suppress Enable. Set to one to stop this bit from
being used.
TDB1
TDC2.0
DS0 Bit 1 Suppress Enable. LSB of the DS0. Set to one to
stop this bit from being used.
16. INTERLEAVED PCM BUS OPERATION
In many architectures, the outputs of individual framers are combined into higher speed serial buses to
simplify transport across the system. The DS21Q44 can be configured to allow each framer’s data and
signaling busses to be multiplexed into higher speed data and signaling busses eliminating external
hardware saving board space and cost.
The interleaved PCM bus option supports two bus speeds and interleave modes. The 4.096 MHz bus
speed allows two framers to share a common bus. The 8.192 MHz bus speed allows all four of the
DS21Q44’s framers to share a common bus. Framers can interleave their data either on byte or frame
boundaries. Framers that share a common bus must be configured through software and require several
device pins to be connected together externally (see figures 16-1 & 16-2). Each framer’s elastic stores
must be enabled and configured for 2.048 MHz operation. The signal RSYNC must be configured as an
input on each framer.
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| DS21Q44T+ | 功能描述:網(wǎng)絡(luò)控制器與處理器 IC Enhanced Quad E1 Framer RoHS:否 制造商:Micrel 產(chǎn)品:Controller Area Network (CAN) 收發(fā)器數(shù)量: 數(shù)據(jù)速率: 電源電流（最大值）:595 mA 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:PBGA-400 封裝:Tray |
| DS21Q44TN | 功能描述:網(wǎng)絡(luò)控制器與處理器 IC RoHS:否 制造商:Micrel 產(chǎn)品:Controller Area Network (CAN) 收發(fā)器數(shù)量: 數(shù)據(jù)速率: 電源電流（最大值）:595 mA 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:PBGA-400 封裝:Tray |
| DS21Q48 | 功能描述:網(wǎng)絡(luò)控制器與處理器 IC 5V Quad E1/T1/J1 Line Interface RoHS:否 制造商:Micrel 產(chǎn)品:Controller Area Network (CAN) 收發(fā)器數(shù)量: 數(shù)據(jù)速率: 電源電流（最大值）:595 mA 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:PBGA-400 封裝:Tray |
| DS21Q48A3N | 功能描述:網(wǎng)絡(luò)控制器與處理器 IC 5V Quad E1/T1/J1 Line Interface RoHS:否 制造商:Micrel 產(chǎn)品:Controller Area Network (CAN) 收發(fā)器數(shù)量: 數(shù)據(jù)速率: 電源電流（最大值）:595 mA 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:PBGA-400 封裝:Tray |
| DS21Q48B | 功能描述:網(wǎng)絡(luò)控制器與處理器 IC RoHS:否 制造商:Micrel 產(chǎn)品:Controller Area Network (CAN) 收發(fā)器數(shù)量: 數(shù)據(jù)速率: 電源電流（最大值）:595 mA 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:PBGA-400 封裝:Tray |
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