- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄10205 > DS2165QN+T&R (Maxim Integrated Products)IC PROC ADPCM 16/24/32K 28-PLCC PDF資料下載
參數(shù)資料
| 型號： | DS2165QN+T&R |
| 廠商： | Maxim Integrated Products |
| 文件頁數(shù)： | 11/17頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC PROC ADPCM 16/24/32K 28-PLCC |
| 產(chǎn)品培訓(xùn)模塊： | Lead (SnPb) Finish for COTS Obsolescence Mitigation Program |
| 標(biāo)準(zhǔn)包裝： | 500 |
| 類型： | ADPCM 處理器 |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 28-LCC（J 形引線） |
| 供應(yīng)商設(shè)備封裝： | 28-PLCC（11.51x11.51） |
| 包裝： | 帶卷 (TR) |
DS2165Q
3 of 17
CONTROL REGISTER
The control register establishes idle, algorithm reset, bypass, data format, and channel coding for the
selected channel.
The X-side and Y-side PCM interfaces can be independently disabled (output tri-stated) by IPD. When
IPD is set for both channels, the device enters a low-power standby mode. In this mode, the serial port
must not be operated faster than 39kHz.
ALRST resets the algorithm coefficients for the selected channel to their initial values. ALRST is cleared
by the device when the algorithm reset is complete.
Table 1. PIN DESCRIPTION
PIN
SYMBOL
TYPE
FUNCTION
2
RST
I
Reset. A high-low-high transition resets the algorithm. The device should be
reset on power-up and when changing to or from the hardware mode.
3
4
TM0
TM1
I
Test Modes 0 and 1. Connect to VSS for normal operation.
6
7
8
9
10
11
A0
A1
A2
A3
A4
A5
I
Address Select. A0 = LSB, A5 = MSB. Must match address/command word
to enable the serial port.
12
SPS
I
Serial Port Select. Connect to VDD to select the serial port; connect to VSS to
select the hardware mode.
13
MCLK
I
Master Clock. 10MHz clock for the ADPCM processing engine; may be
asynchronous to SCLK, CLKX, and CLKY.
14
VSS
—
Signal Ground. 0V
16
XIN
I
X Data In. Sampled on falling edge of CLKX during selected time slots.
17
CLKX
I
X Data Clock. Data clock for the X-side PCM interface; must be
synchronous with FSX.
18
FSX
I
X Frame Sync. 8kHz frame sync for the X-side PCM interface.
20
XOUT
O
X Data Output. Updated on rising edge of CLKX during selected time slots.
21
SCLK
I
Serial Data Clock. Used to write to the serial port registers.
22
SDI
I
Serial Data In. Data for on-board control registers; sampled on the rising
edge of SCLK. LSB sent first.
23
CS
I
Chip Select. Must be low to write to the serial port.
24
YOUT
O
Y Data Output. Updated on rising edge of CLKY during selected time slots.
25
FSY
I
Y Frame Sync. 8kHz frame sync for the Y-side PCM interface.
26
CLKY
I
Y Data Clock. Data clock for the Y-side PCM interface; must be
synchronous with FSY.
27
YIN
I
Y Data In. Sampled on falling edge of CLKY during selected time slots.
28
VDD
—
Positive Supply. 5.0V (3.0V for DS2165QL)
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| 97-3102A-24-10P | CONN RCPT 7POS BOX MNT W/PIN |
| EN3C12F26SX | CONN PLUG 12POS FEMALE CORD #26 |
| MS27484P12A35S | CONN PLUG 22POS STRAIGHT W/SCKT |
| CXC3106A184S | CONN PLUG 4POS STRGHT SKT |
| MS27467E19A11S | CONN PLUG 11POS STRAIGHT W/SCKT |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| DS2167 | 功能描述:IC PROC ADPCM 16/24/32K 24-DIP RoHS:否 類別:集成電路 (IC) >> 線性 - 音頻處理 系列:- 其它有關(guān)文件:STA321 View All Specifications 標(biāo)準(zhǔn)包裝:1 系列:Sound Terminal™ 類型:音頻處理器 應(yīng)用:數(shù)字音頻 安裝類型:表面貼裝 封裝/外殼:64-LQFP 裸露焊盤 供應(yīng)商設(shè)備封裝:64-LQFP EP（10x10） 包裝:Digi-Reel® 其它名稱:497-11050-6 |
| DS2167N | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Transcoder |
| DS2167Q | 功能描述:IC PROC ADPCM 16/24/32K 28-PLCC RoHS:否 類別:集成電路 (IC) >> 線性 - 音頻處理 系列:- 其它有關(guān)文件:STA321 View All Specifications 標(biāo)準(zhǔn)包裝:1 系列:Sound Terminal™ 類型:音頻處理器 應(yīng)用:數(shù)字音頻 安裝類型:表面貼裝 封裝/外殼:64-LQFP 裸露焊盤 供應(yīng)商設(shè)備封裝:64-LQFP EP（10x10） 包裝:Digi-Reel® 其它名稱:497-11050-6 |
| DS2167QN | 功能描述:IC PROC ADPCM 16/24/32K 28-PLCC RoHS:否 類別:集成電路 (IC) >> 線性 - 音頻處理 系列:- 其它有關(guān)文件:STA321 View All Specifications 標(biāo)準(zhǔn)包裝:1 系列:Sound Terminal™ 類型:音頻處理器 應(yīng)用:數(shù)字音頻 安裝類型:表面貼裝 封裝/外殼:64-LQFP 裸露焊盤 供應(yīng)商設(shè)備封裝:64-LQFP EP（10x10） 包裝:Digi-Reel® 其它名稱:497-11050-6 |
| DS2167QN/T&R | 制造商:Maxim Integrated Products 功能描述:IC PROC ADPCM 16/24/32K 28-PLCC |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。