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參數資料
| 型號： | DS21354LN |
| 廠商： | MAXIM INTEGRATED PRODUCTS INC |
| 元件分類： | Digital Transmission Interface |
| 英文描述： | DATACOM, PCM TRANSCEIVER, PQFP100 |
| 封裝： | 14 X 14 MM, LQFP-100 |
| 文件頁數： | 92/126頁 |
| 文件大?。?/td> | 1082K |
| 代理商： | DS21354LN |
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DS21354/DS21554 3.3V/5V E1 Single-Chip Transceivers
68 of 124
TNAF: TRANSMIT NON-ALIGN FRAME REGISTER (Address = 21 Hex)
(MSB)
(LSB)
Si
1
A
Sa4
Sa5
Sa6
Sa7
Sa8
SYMBOL
POSITION
NAME AND DESCRIPTION
Si
TNAF.7
International Bit.
1
TNAF.6
Frame Non-Alignment Signal Bit.
A
TNAF.5
Remote Alarm (used to transmit the alarm).
Sa4
TNAF.4
Additional Bit 4.
Sa5
TNAF.3
Additional Bit 5.
Sa6
TNAF.2
Additional Bit 6.
Sa7
TNAF.1
Additional Bit 7.
Sa8
TNAF.0
Additional Bit 8.
Note: Bit 6 of the TNAF register must be programmed to one. The DS21354/DS21554 do not
automatically set this bit.
13.3.
Internal Register Scheme Based On CRC4 Multiframe
On the receive side, there is a set of eight registers (RSiAF, RSiNAF, RRA, RSa4 to RSa8) that report the
Si and Sa bits as they are received. These registers are updated with the setting of the Receive CRC4
Multiframe bit in Status Register 2 (SR2.1). The host can use the SR2.1 bit to know when to read these
registers. The user has 2ms to retrieve the data before it is lost. The MSB of each register is the first
received. Please see the register descriptions below for more details.
On the transmit side, there is also a set of eight registers (TSiAF, TSiNAF, TRA, TSa4 to TSa8) that via
the Transmit Sa-Bit Control Register (TSaCR), can be programmed to insert both Si and Sa data. Data is
sampled from these registers with the setting of the Transmit Multiframe bit in Status Register 2 (SR2.5).
The host can use the SR2.5 bit to know when to update these registers. It has 2ms to update the data or
else the old data will be retransmitted. The MSB of each register is the first bit transmitted. Please see the
register descriptions below and Figure 18-15 for more details.
REGISTER
ADDRESS (HEX)
FUNCTION
RSiAF
58
The eight Si bits in the align frame
RSiNAF
59
The eight Si bits in the non-align frame
RRA
5A
The eight reportings of the receive remote alarm (RA)
RSa4
5B
The eight Sa4 reported in each CRC4 multiframe
RSa5
5C
The eight Sa5 reported in each CRC4 multiframe
RSa6
5D
The eight Sa6 reported in each CRC4 multiframe
RSa7
5E
The eight Sa7 reported in each CRC4 multiframe
RSa8
5F
The eight Sa8 reported in each CRC4 multiframe
TSiAF
50
The eight Si bits to be inserted into the align frame
TSiNAF
51
The eight Si bits to be inserted into the non-align frame
TRA
52
The eight settings of remote alarm (RA)
TSa4
53
The eight Sa4 settings in each CRC4 multiframe
TSa5
54
The eight Sa5 settings in each CRC4 multiframe
TSa6
55
The eight Sa6 settings in each CRC4 multiframe
TSa7
56
The eight Sa7 settings in each CRC4 multiframe
TSa8
57
The eight Sa8 settings in each CRC4 multiframe
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相關代理商/技術參數 |
參數描述 |
|---|---|
| DS21354LN+ | 功能描述:網絡控制器與處理器 IC 3.3/5V E1 Single Chip Transceiver RoHS:否 制造商:Micrel 產品:Controller Area Network (CAN) 收發(fā)器數量: 數據速率: 電源電流（最大值）:595 mA 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:PBGA-400 封裝:Tray |
| DS21372 | 制造商:DALLAS 制造商全稱:Dallas Semiconductor 功能描述:3.3V Bit Error Rate Tester BERT |
| DS21372T | 功能描述:網絡控制器與處理器 IC 3.3V Bit Error Rate Tester (BERT) RoHS:否 制造商:Micrel 產品:Controller Area Network (CAN) 收發(fā)器數量: 數據速率: 電源電流（最大值）:595 mA 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:PBGA-400 封裝:Tray |
| DS21372T+ | 功能描述:網絡控制器與處理器 IC 3.3V Bit Error Rate Tester (BERT) RoHS:否 制造商:Micrel 產品:Controller Area Network (CAN) 收發(fā)器數量: 數據速率: 電源電流（最大值）:595 mA 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:PBGA-400 封裝:Tray |
| DS21372TN | 功能描述:網絡控制器與處理器 IC 3.3V Bit Error Rate Tester (BERT) RoHS:否 制造商:Micrel 產品:Controller Area Network (CAN) 收發(fā)器數量: 數據速率: 電源電流（最大值）:595 mA 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:PBGA-400 封裝:Tray |
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