參數(shù)資料
型號: DS18B20-PAR/T&R
廠商: MAXIM INTEGRATED PRODUCTS INC
元件分類: Switch/Digital Output Temperature Sensor
英文描述: DIGITAL TEMP SENSOR-SERIAL, 12BIT(s), 0.50Cel, ROUND, THROUGH HOLE MOUNT
封裝: TO-92, 3 PIN
文件頁數(shù): 12/19頁
文件大?。?/td> 203K
代理商: DS18B20-PAR/T&R
DS18B20-PAR
2 of 19
DETAILED PIN DESCRIPTIONS Table 1
PIN
SYMBOL
DESCRIPTION
1
GND
Ground.
2
DQ
Data Input/Output pin. Open-drain 1-Wire interface pin. Also provides power
to the device when used in parasite power mode (see “Parasite Power” section.)
3
NC
No Connect. Doesn’t connect to internal circuit.
OVERVIEW
The DS18B20-PAR uses Dallas’ exclusive 1-Wire bus protocol that implements bus communication
using one control signal. The control line requires a weak pullup resistor since all devices are linked to
the bus via a 3-state or open-drain port (the DQ pin in the case of the DS18B20-PAR). In this bus
system, the microprocessor (the master device) identifies and addresses devices on the bus using each
device’s unique 64-bit code. Because each device has a unique code, the number of devices that can be
addressed on one bus is virtually unlimited. The 1-Wire bus protocol, including detailed explanations of
the commands and “time slots,” is covered in the 1-WIRE BUS SYSTEM section of this datasheet.
An important feature of the DS18B20-PAR is its ability to operate without an external power supply.
Power is instead supplied through the 1-Wire pullup resistor via the DQ pin when the bus is high. The
high bus signal also charges an internal capacitor (CPP), which then supplies power to the device when the
bus is low. This method of deriving power from the 1-Wire bus is referred to as “parasite power.”
Figure 1 shows a block diagram of the DS18B20-PAR, and pin descriptions are given in Table 1. The
64-bit ROM stores the device’s unique serial code. The scratchpad memory contains the 2-byte
temperature register that stores the digital output from the temperature sensor. In addition, the scratchpad
provides access to the 1-byte upper and lower alarm trigger registers (TH and TL). The TH and TL
registers are nonvolatile (EEPROM), so they will retain their data when the device is powered down.
DS18B20-PAR BLOCK DIAGRAM Figure 1
CPP
VPU
4.7K
64-BIT ROM
AND
1-wire PORT
DQ
INTERNAL VDD
PARASITE POWER
CIRCUIT
MEMORY CONTROL
LOGIC
SCRATCHPAD
8-BIT CRC GENERATOR
TEMPERATURE SENSOR
ALARM HIGH TRIGGER (TH)
REGISTER (EEPROM)
ALARM LOW TRIGGER (TL)
REGISTER (EEPROM)
CONFIGURATION REGISTER
(EEPROM)
GND
DS18B20-PAR
相關PDF資料
PDF描述
DS18B20-PAR DIGITAL TEMP SENSOR-SERIAL, 12BIT(s), 0.50Cel, ROUND, THROUGH HOLE MOUNT
DS18B20P DIGITAL TEMP SENSOR-SERIAL, 12BIT(s), 0.50Cel, RECTANGULAR, SURFACE MOUNT
DS18B20X DIGITAL TEMP SENSOR-SERIAL, 12BIT(s), 2Cel, RECTANGULAR, SURFACE MOUNT
DS18B20Z DIGITAL TEMP SENSOR-SERIAL, 12BIT(s), 0.50Cel, RECTANGULAR, SURFACE MOUNT
DS18B20 DIGITAL TEMP SENSOR-SERIAL, 12BIT(s), 0.50Cel, RECTANGULAR, THROUGH HOLE MOUNT
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