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參數(shù)資料
| 型號(hào)： | DS1882Z-050+T&R |
| 廠商： | Maxim Integrated Products |
| 文件頁數(shù)： | 3/15頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC POT DIGIT DL LOG 50K 16SOIC |
| 產(chǎn)品培訓(xùn)模塊： | Lead (SnPb) Finish for COTS Obsolescence Mitigation Program |
| 標(biāo)準(zhǔn)包裝： | 2,500 |
| 接片： | 64 |
| 電阻（歐姆）： | 45k |
| 電路數(shù)： | 2 |
| 溫度系數(shù)： | 標(biāo)準(zhǔn)值 750 ppm/°C |
| 存儲(chǔ)器類型： | 非易失 |
| 接口： | I²C（設(shè)備位址） |
| 電源電壓： | 4.5 V ~ 7 V |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 16-SOIC（0.154"，3.90mm 寬） |
| 供應(yīng)商設(shè)備封裝： | 16-SOIC |
| 包裝： | 帶卷 (TR) |
DS1882
Dual Log Audio Digital Potentiometer
____________________________________________________________________
11
I2C Interface for the DS1882
The CE pin serves as a communication enable pin.
When active (CE = 0), the inputs SDA and SCL are rec-
ognized by the device. If inactive (CE = 1), pins SDA
and SCL are disabled, making I2C communication
impossible.
Three pins, A0, A1, A2, serve as slave address inputs.
For multidrop configurations, they allow eight such
devices to be addressed by the same I2C bus. If the
I2C address matches the hardware levels of these bits,
the DS1882 is allowed to receive communications from
the I2C bus.
The I2C slave address byte is shown below. This is the
first byte transmitted from the master to the DS1882.
The upper nibble value is fixed to 0101. Bit values A2,
A1, and A0 are determined by the states of the corre-
sponding pins. The LSB, R/W, determines whether a
read or write will be performed.
The next byte to be transmitted is the Command Byte
(see the Command Byte section for details).
READ PROTOCOL
0
MSB
LSB
POT-0
1
0
MSB
LSB
POT-1
A
0
A
1
A
2
1
10 1
0
MSB
LSB
R/W = 1
DATA BYTES ARE READ IN THE ORDER SHOWN ABOVE.
COMMAND
BYTE
COMMAND
BYTE
COMMAND
BYTE
SLAVE ADDRESS
BYTE
MSB
LSB
CONFIG
REG
10
ST
AR
T
ACK
NACK
STOP
Figure 1. Read Protocol
SLAVE ADDRESS BYTE
0
1
0
1
A2A1A0
R/W
MSB
LSB
Reading Pot Values
As shown in Figure 1, the DS1882 provides one read
command operation. This operation allows the user to
read both Potentiometer Wiper Setting Registers and
the Configuration Register. To initiate a read operation,
the R/W bit of the slave address byte is set to 1.
Communication to read the DS1882 begins with a
START condition, which is issued by the master device.
The slave address byte sent from the master device fol-
lows the START condition. Once a matching slave
address byte has been received by the DS1882, the
DS1882 responds with an acknowledge. The master
can then begin to receive data. The value of the wiper
of Potentiometer 0 is the first returned from the DS1882.
It is then followed by the value of Potentiometer 1 and
then the value of the Configuration Register. Once the 8
bits of the Configuration Register have been sent, the
master needs to issue an acknowledge, unless it is the
last byte to be read, in which case the master issues a
not acknowledge. If desired, the master may stop the
communication transfer at this point by issuing the
STOP condition after the not acknowledge. However, if
the value of the three registers is needed again, the
transfer can continue by clocking the 8 bits of the
Potentiometer 0 value as described above.
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| DS1884T+ | 功能描述:ADC / DAC多通道 SFP+ Controller w/ Digi LDD Interface RoHS:否 制造商:Texas Instruments 轉(zhuǎn)換速率: 分辨率:8 bit 接口類型:SPI 電壓參考: 電源電壓-最大:3.6 V 電源電壓-最小:2 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:VQFN-40 |
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