參數(shù)資料
型號(hào)： DS1878T+T&R
廠商： Maxim Integrated Products
文件頁(yè)數(shù)： 13/101頁(yè)
文件大?。?/td> 0K
描述： IC CTLR SFP W/DGTL LDD RX 28TQFN
標(biāo)準(zhǔn)包裝： 2,500
類(lèi)型： SFP+ 控制器
輸入類(lèi)型： 模擬，數(shù)字
輸出類(lèi)型： 數(shù)字
接口： I²C，LDD，串行
電流 - 電源： 2.5mA
安裝類(lèi)型： 表面貼裝
封裝/外殼： 28-WFQFN 裸露焊盤(pán)
供應(yīng)商設(shè)備封裝： 28-TQFN-EP（5x5）
包裝： 帶卷 (TR)
DS1878
Low-Voltage Operation
The device contains two power-on reset (POR) levels.
The lower level is a digital POR (POD) and the higher
level is an analog POR (POA). At startup, before the
supply voltage rises above POA, the outputs are dis-
abled, all SRAM locations are set to their defaults,
shadowed EEPROM (SEE) locations are zero, and all
analog circuitry is disabled. When VCC reaches POA,
the SEE is recalled, and the analog circuitry is enabled.
While VCC remains above POA, the device is in its nor-
mal operating state, and it responds based on its non-
volatile configuration. If during operation VCC falls
below POA, but is still above POD, then the SRAM
retains the SEE settings from the first SEE recall, but the
device analog is shut down and the outputs disabled. If
the supply voltage recovers back above POA, then the
device immediately resumes normal operation. If the
supply voltage falls below POD, then the device SRAM
is placed in its default state and another SEE recall is
required to reload the nonvolatile settings. The
EEPROM recall occurs the next time VCC exceeds
POA. Figure 10 shows the sequence of events as the
voltage varies.
Any time VCC is above POD, the I2C interface can be
used to determine if VCC is below the POA level. This is
accomplished by checking the RDYB bit in the STATUS
(Lower Memory, Register 6Eh) byte. RDYB is set when
VCC is below POA; when VCC rises above POA, RDYB
SFP+ Controller with Digital LDD Interface
______________________________________________________________________________________
19
VPOA
VPOD
VCC
SEE
RECALLED VALUE
PRECHARGED
TO 0
PRECHARGED
TO 0
PRECHARGED TO 0
SEE RECALL
Figure 10. Low-Voltage Hysteresis Example
RSSI RESULT
FINE
FULL-SCALE
RESPONSE
COARSE
FULL-SCALE
RESPONSE
FINE
RIGHT-SHIFT
= 3
MON3 INPUT
FINE
COARSE
HYSTERESIS
Figure 9. RSSI with Crossover Disabled
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