參數(shù)資料
型號(hào): DS1846E-010+
廠商: Maxim Integrated Products
文件頁(yè)數(shù): 2/18頁(yè)
文件大小: 0K
描述: IC NV TRI-POT MEM MON 20TSSOP
產(chǎn)品培訓(xùn)模塊: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
標(biāo)準(zhǔn)包裝: 74
接片: 100,256
電阻(歐姆): 10k,100k
電路數(shù): 3
溫度系數(shù): 標(biāo)準(zhǔn)值 750 ppm/°C
存儲(chǔ)器類(lèi)型: 非易失
接口: 3 線串行(設(shè)備位址)
電源電壓: 4.5 V ~ 5.5 V
工作溫度: -40°C ~ 85°C
安裝類(lèi)型: 表面貼裝
封裝/外殼: 20-TSSOP(0.173",4.40mm 寬)
供應(yīng)商設(shè)備封裝: 20-TSSOP
包裝: 管件
產(chǎn)品目錄頁(yè)面: 1430 (CN2011-ZH PDF)
DS1846
10 of 18
DEVICE OPERATION
Power Monitor
The DS1846 detects out-of-tolerance power-supply conditions and warns a processor-based system of an
impending power failure. When VCC falls below the minimum VCC tolerance, a comparator asserts the
RST and RST signals. On power-up, RST and RST are kept active for a minimum of tRST to allow the
power supply and processor to stabilize.
Pushbutton Reset
The DS1846 provides an input pin for direct connection to a pushbutton reset (see Figure 4). The
pushbutton reset input requires an active-low signal. Internally, this input is debounced and timed such
that RST and RST signals of at least tRST minimum are generated. The tRST delay commences as the
pushbutton reset input is released from the low level. The pushbutton can be initiated by connecting the
NMI
output to the PBRST input as shown in Figure 4.
Nonmaskable Interrupt
The DS1846 generates a nonmaskable interrupt ( NMI ) for early warning of a power failure. A precision
comparator monitors the voltage level at the IN pin relative to an on-chip reference generated by an
internal bandgap. The IN pin is a high-impedance input allowing for a user-defined sense point. An
external resistor voltage-divider network (Figure 4) is used to set a trip point. This sense point may be
derived from a regulated supply or from a higher DC voltage level closer to the main system power input.
With the IN trip point, VTP, the proper values for R1 and R2 can be determined by the equation as shown
in Figure 4. Proper operation of the DS1846 requires that the voltage at the IN pin be limited to VCC.
Therefore, the maximum allowable voltage at the supply being monitored (VMAX) can also be derived as
shown in Figure 4. A simple approach to solving the equation is to select a value for R2 high enough to
keep power consumption low, and solve for R1. The flexibility of the IN input pin allows for detection of
power loss at the earliest point in a power-supply system, maximizing the amount of time for system
shut-down between NMI and RST/ RST .
When the supply being monitored decays to the voltage sense point, the DS1846 pulses the NMI output
to the active state for a minimum tNMI. During a power-up, any detected IN pin levels below VTP by the
comparator are disabled from generating an interrupt until VCC rises to VCCTP. As a result, any potential
NMI
pulse is not initiated until VCC reaches VCCTP.
Connecting NMI to PBRST allows the nonmaskable interrupt to generate an automatic reset when an out-
of-tolerance condition occurred in a monitored supply. An example is shown in Figure 4.
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