參數(shù)資料
型號： DS17487B-5
英文描述： 3V/5V Real-Time Clock
中文描述： 3V/5V實時時鐘
文件頁數(shù)： 10/38頁
文件大?。?/td> 427K
代理商： DS17487B-5
DS17485/DS17487
10 of 38
REGISTER B
MSB
BIT 7
SET
SET –
When the SET bit is a 0, the update transfer functions normally by advancing the counts once per
second. When the SET bit is written to a 1, any update transfer is inhibited and the program can initialize
the time and calendar bytes without an update occurring in the midst of initializing. Read cycles can be
executed in a similar manner. SET is a read/write bit that is not modified by internal functions of the
DS17485/DS17487.
PIE – Periodic Interrupt Enable.
The PIE bit is a read/write bit, which allows the periodic interrupt flag
(PF) bit in Register C to drive the
IRQ
pin low. When the PIE bit is set to 1, periodic interrupts are
generated by driving the
IRQ
pin low at a rate specified by the RS3–RS0 bits of Register A. A 0 in the
PIE bit blocks the
IRQ
output from being driven by a periodic interrupt, but the PF bit is still set at the
periodic rate. PIE is not modified by any internal DS17485/DS17487 functions.
AIE – Alarm Interrupt Enable.
The AIE bit is a read/write bit which, when set to a 1, permits the alarm
flag (AF) bit in Register C to assert
IRQ
. An alarm interrupt occurs for each second that the three time
bytes equal the three alarm bytes, including a “don’t care” alarm code of binary 11XXXXXX. When the
AIE bit is set to 0, the AF bit does not initiate the
IRQ
signal. The internal functions of the
DS17485/DS17487 do not affect the AIE bit.
UIE – Update-Ended Interrupt Enable
. The UIE bit is a read/write bit that enables the update-end flag
(UF) bit in Register C to assert
IRQ
. The SET bit going high clears the UIE bit.
SQWE – Square-Wave Enable.
When the SQWE bit is set to a 1 and E32k = 0, a square-wave signal at
the frequency set by the rate-selection bits RS3 through RS0 is driven out on the SQW pin. When the
SQWE bit is set to 0and E32k = 0, the SQW pin is held low. SQWE is a read/write bit. SQWE is set to a
1 when V
CC
is powered up.
DM – Data Mode.
The DM bit indicates whether time and calendar information is in binary or BCD
format. The DM bit is set by the program to the appropriate format and can be read as required. This bit is
not modified by internal functions. A 1 in DM signifies binary data while a 0 in DM specifies BCD data.
24/12 – 24/12-Control
Bit.
This bit establishes the format of the hours byte. A 1 indicates the 24-hour
mode and a 0 indicates the 12-hour mode. This bit is read/write.
DSE – Daylight Savings Enable.
The DSE bit is a read/write bit that enables two special updates when
DSE is set to 1. On the first Sunday in April, the time increments from 1:59:59 AM to 3:00:00 AM. On
the last Sunday in October, when the time first reaches 1:59:59 AM, it changes to 1:00:00 AM. These
special updates do not occur when the DSE bit is a 0. This bit is not affected by internal functions.
BIT 5
AIE
LSB
BIT 0
DSE
BIT 6
PIE
BIT 4
UIE
BIT 3
SQWE
BIT 2
DM
BIT 1
24/12
相關(guān)PDF資料
PDF描述
DS17487BN-3 3V/5V Real-Time Clock
DS17487BN-5 3V/5V Real-Time Clock
DS17487N-3 3V/5V Real-Time Clock
DS17487N-5 49.9 1% 1/4W 1206
DS17486 3V/5V Real-Time Clock
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
DS17487BN-3 制造商:DALLAS 制造商全稱:Dallas Semiconductor 功能描述:3V/5V Real-Time Clock
DS17487BN-5 制造商:DALLAS 制造商全稱:Dallas Semiconductor 功能描述:3V/5V Real-Time Clock
DS17487N-3 功能描述:IC RTC 3V 4K NV RAM 24-EDIP RoHS:否 類別:集成電路 (IC) >> 時鐘/計時 - 實時時鐘 系列:- 產(chǎn)品培訓模塊:Obsolescence Mitigation Program 標準包裝:1 系列:- 類型:時鐘/日歷 特點:警報器，閏年，SRAM 存儲容量:- 時間格式:HH:MM:SS（12/24 小時） 數(shù)據(jù)格式:YY-MM-DD-dd 接口:SPI 電源電壓:2 V ~ 5.5 V 電壓 - 電源，電池:- 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:8-WDFN 裸露焊盤 供應商設(shè)備封裝:8-TDFN EP 包裝:管件
DS17487N-5 制造商:DALLAS 制造商全稱:Dallas Semiconductor 功能描述:3V/5V Real-Time Clock
DS17488 制造商:DALLAS 制造商全稱:Dallas Semiconductor 功能描述:3V/5V Real-Time Clock
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