參數(shù)資料
型號: DS17285-3
廠商: MAXIM INTEGRATED PRODUCTS INC
元件分類: Timer or RTC
英文描述: 1 TIMER(S), REAL TIME CLOCK, PDIP24
封裝: 0.600 INCH, PLASTIC, DIP-24
文件頁數(shù): 34/35頁
文件大?。?/td> 662K
代理商: DS17285-3
DS17285/DS17287/DS17485/DS17487/DS17885/DS17887
Real-Time Clocks
8
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Pin Description (continued)
PIN
24
28
NAME
FUNCTION
13
23
CS
Active-Low Chip-Select Input. This pin must be asserted low during a bus cycle for the device
to be accessed. CS must be kept in the active state during RD and WR. Bus cycles that take
place without asserting CS latch addresses, but no access occurs.
14
24
ALE
Address Latch Enable Input, Active High. This input pin is used to demultiplex the
address/data bus. The falling edge of ALE causes the address to be latched within the device.
15
25
WR
Active-Low Write Input. This pin defines the period during which data is written to the
addressed register.
17
27
RD
Active-Low Read Input. This pin identifies the period when the device drives the bus with read
data. It is an enable signal for the output buffers of the device.
18
28
KS
Active-Low Kickstart Input. When VCC is removed from the device, the system can be
powered on in response to an active-low transition on the KS pin, as might be generated from
a key closure. VBAUX must be present and auxiliary-battery-enable bit (ABE) must be set to 1 if
the kickstart function is used, and the KS pin must be pulled up to the VBAUX supply. While
VCC is applied, the KS pin can be used as an interrupt input. If not used, KS must be
grounded and ABE set to 0.
19
1
IRQ
Active-Low Interrupt Request. This pin is an active-low output that can be used as an interrupt
input to a processor. The IRQ output remains low as long as the status bit causing the interrupt
is present and the corresponding interrupt-enable bit is set. To clear the IRQ pin, the
application software must clear all enabled flag bits contributing to the pin’s active state. When
no interrupt conditions are present, the IRQ level is in the high-impedance state. Multiple
interrupting devices can be connected to an IRQ bus, provided that they are all open drain.
The IRQ pin requires an external pullup resistor to VCC.
20
2
VBAT
Connection for Primary Battery. This supply input is used to power the normal clock functions
when VCC is absent. Diodes placed in series between VBAT and the battery can prevent
proper operation. If VBAT is not required, the pin must be grounded. UL recognized to ensure
against reverse charging current when used with a lithium battery (www.maxim-
ic.com/qa/info/ul). This pin is missing (N.C.) on the EDIP package.
相關PDF資料
PDF描述
DS17885SN-5 1 TIMER(S), REAL TIME CLOCK, PDSO24
DS17287-3 1 TIMER(S), REAL TIME CLOCK, PDIP24
DS17487-5 1 TIMER(S), REAL TIME CLOCK, PDIP24
DS17885-5 1 TIMER(S), REAL TIME CLOCK, PDIP24
DS17285N-5 1 TIMER(S), REAL TIME CLOCK, PDSO24
相關代理商/技術參數(shù)
參數(shù)描述
DS17285-3+ 功能描述:實時時鐘 3V/5V RTC K Multiplexed Kick-S RoHS:否 制造商:Microchip Technology 功能:Clock, Calendar. Alarm RTC 總線接口:I2C 日期格式:DW:DM:M:Y 時間格式:HH:MM:SS RTC 存儲容量:64 B 電源電壓-最大:5.5 V 電源電壓-最小:1.8 V 最大工作溫度:+ 85 C 最小工作溫度: 安裝風格:Through Hole 封裝 / 箱體:PDIP-8 封裝:Tube
DS17285-5 功能描述:實時時鐘 RoHS:否 制造商:Microchip Technology 功能:Clock, Calendar. Alarm RTC 總線接口:I2C 日期格式:DW:DM:M:Y 時間格式:HH:MM:SS RTC 存儲容量:64 B 電源電壓-最大:5.5 V 電源電壓-最小:1.8 V 最大工作溫度:+ 85 C 最小工作溫度: 安裝風格:Through Hole 封裝 / 箱體:PDIP-8 封裝:Tube
DS17285-5+ 功能描述:實時時鐘 3V/5V RTC K Multiplexed Kick-S RoHS:否 制造商:Microchip Technology 功能:Clock, Calendar. Alarm RTC 總線接口:I2C 日期格式:DW:DM:M:Y 時間格式:HH:MM:SS RTC 存儲容量:64 B 電源電壓-最大:5.5 V 電源電壓-最小:1.8 V 最大工作溫度:+ 85 C 最小工作溫度: 安裝風格:Through Hole 封裝 / 箱體:PDIP-8 封裝:Tube
DS17285-DS17287 制造商:DALLAS 制造商全稱:Dallas Semiconductor 功能描述:3V/5V Real-Time Clock
DS17285E3 制造商:MAXIM 制造商全稱:Maxim Integrated Products 功能描述:Real-Time Clocks