參數資料
| 型號： | DS1693+ |
| 廠商： | Maxim Integrated Products |
| 文件頁數： | 14/36頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC RTC W/NV RAM 3V/5V 28-EDIP |
| 標準包裝： | 12 |
| 類型： | 時鐘/日歷 |
| 特點： | NVSRAM |
| 存儲容量： | 114B |
| 時間格式： | HH:MM:SS（12/24 小時） |
| 數據格式： | YY-MM-DD-dd |
| 接口： | 并聯 |
| 電源電壓： | 2.7 V ~ 3.3 V，4.5 V ~ 5.5 V |
| 電壓 - 電源，電池： | 2.5 V ~ 3.7 V |
| 工作溫度： | 0°C ~ 70°C |
| 安裝類型： | 通孔 |
| 封裝/外殼： | 28-DIP 模塊（0.600"，15.24mm） |
| 供應商設備封裝： | 28-EDIP |
| 包裝： | 管件 |
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DS1689/DS1693
21 of 36
EXTENDED CONTROL REGISTERS
Two extended control registers are provided to supply controls and status information for the extended
features offered by the DS1689/DS1693. These are designated as extended control registers A and B and
are located in register bank 1, locations 04AH and 04BH, respectively. The functions of the bits within
these registers are described as follows.
Extended Control Register 4A
MSB
LSB
BIT 7
BIT 6
BIT 5
BIT 4
BIT 3
BIT 2
BIT 1
BIT 0
VRT2
INCR
*
PAB
RF
WF
KF
*Reserved bits. These bits are reserved for future use by Dallas Semiconductor. They can be read and written, but have no effect on
operation.
Bit 7: VRT2. This status bit gives the condition of the auxiliary battery. It is set to a logic 1 condition
when the external lithium battery is connected to the VBAUX. If this bit is read as logic 0, the external
battery should be replaced.
Bit 6: INCR (Increment in Progress Status). This bit is set to 1 when an increment to the time/date
registers is in progress and the alarm checks are being made. INCR is set to 1 at 122
s before the update
cycle starts and is cleared to 0 at the end of each update cycle.
Bit 4: PAB (Power Active Bar Control). When this bit is 0, the
PWR pin is in the active-low state. The
user can write this bit to logic 1 or logic 0. If either [WF and WIE = 1] or [KF and KSE = 1], the PAB bit
is cleared to 0.
Bit 2: RF (RAM Clear Flag). This bit is set to logic 1 when a high-to-low transition occurs on the
RCLR
input if RCE = 1. The RF bit is cleared by writing it to logic 0. This bit can also be written to logic 1 to
force an interrupt condition.
Bit 1: WF (Wake-Up Alarm Flag). This bit is set to 1 when a wake-up alarm condition occurs or when
the user writes it to 1. WF is cleared by writing it to 0.
Bit 0: KF (Kickstart Flag). This bit is set to 1 when a kickstart condition occurs or when the user writes
it to 1. This bit is cleared by writing it to logic 0.
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相關代理商/技術參數 |
參數描述 |
|---|---|
| DS1693+ | 功能描述:實時時鐘 RoHS:否 制造商:Microchip Technology 功能:Clock, Calendar. Alarm RTC 總線接口:I2C 日期格式:DW:DM:M:Y 時間格式:HH:MM:SS RTC 存儲容量:64 B 電源電壓-最大:5.5 V 電源電壓-最小:1.8 V 最大工作溫度:+ 85 C 最小工作溫度: 安裝風格:Through Hole 封裝 / 箱體:PDIP-8 封裝:Tube |
| DS1697N WAF | 制造商:Texas Instruments 功能描述: |
| DS1699-010 | 制造商:DALLAS 制造商全稱:Dallas Semiconductor 功能描述:ELECTRONIC DIGITAL RHEOSTAT |
| DS1699-10 | 制造商:DALLAS 制造商全稱:Dallas Semiconductor 功能描述:ELECTRONIC DIGITAL RHEOSTAT |
| DS1699-100 | 制造商:DALLAS 制造商全稱:Dallas Semiconductor 功能描述:ELECTRONIC DIGITAL RHEOSTAT |
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