參數(shù)資料
型號(hào): DS1646-120
廠商: DALLAS SEMICONDUCTOR
元件分類: Timer or RTC
英文描述: 0 TIMER(S), REAL TIME CLOCK, DMA32
封裝: MODULE, DIP-32
文件頁(yè)數(shù): 5/11頁(yè)
文件大小: 382K
代理商: DS1646-120
3 of 11
080299
BLOCK DIAGRAM DS1646 Figure 1
TRUTH TABLE DS1646 Table 1
VCC
CE
OE
WE
MODE
DQ
POWER
VIH
X
DESELECT
HIGH-Z
STANDBY
X
DESELECT
HIGH-Z
STANDBY
VIL
X
VIL
WRITE
DATA IN
ACTIVE
VIL
VIH
READ
DATA OUT
ACTIVE
5 VOLTS
± 10%
VIL
VIH
READ
HIGH-Z
ACTIVE
<4.5 VOLTS >VBAT
X
DESELECT
HIGH-Z
CMOS STANDBY
<VBAT
X
DESELECT
HIGH-Z
DATA RETENTION
MODE
SETTING THE CLOCK
The 8th bit of the control register is the write bit. Setting the write bit to a 1, like the read bit halts updates
to the DS1646 registers. The user can then load them with the correct day, date and time data in 24-hour
BCD format. Resetting the write bit to a 0 then transfers those values to the actual clock counters and
allows normal operation to resume.
STOPPING AND STARTING THE CLOCK OSCILLATOR
The clock oscillator may be stopped at any time. To increase the shelf life, the oscillator can be turned off
to minimize current drain from the battery. The OSC bit is the MSB for the second’s registers. Setting it
to a 1 stops the oscillator.
FREQUENCY TEST BIT
Bit 6 of the day byte is the frequency test bit. When the frequency test bit is set to logic 1 and the
oscillator is running, the LSB of the second’s register will toggle at 512 Hz. When the seconds register is
being read, the DQ0 line will toggle at the 512 Hz frequency as long as conditions for access remain valid
(i.e., CE low, OE low, and address for seconds register remain valid and stable).
相關(guān)PDF資料
PDF描述
DS1646P-120 0 TIMER(S), REAL TIME CLOCK, DMA34
DS1646L-120 0 TIMER(S), REAL TIME CLOCK, DSO34
DS1646 0 TIMER(S), REAL TIME CLOCK, DMA32
DS1646P 0 TIMER(S), REAL TIME CLOCK, DMA34
DS1647-120 0 TIMER(S), REAL TIME CLOCK, DMA28
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