參數(shù)資料
型號(hào): DS1501YS
英文描述: Real-Time Clock
中文描述: 實(shí)時(shí)時(shí)鐘
文件頁(yè)數(shù): 4/30頁(yè)
文件大?。?/td> 291K
代理商: DS1501YS
DS1501/DS1511
4 of 30
DATA READ MODE
The DS1501/DS1511 is in the read mode whenever
CE
(chip enable) is low and
WE
(write enable) is
high. The device architecture allows ripple-through access to any valid address location. Valid data will
be available at the DQ pins within t
AA
(Address Access) after the last address input is stable, providing
that
CE
and
OE
access times are satisfied. If
CE
or
OE
access times are not met, valid data will be
available at the latter of chip enable access (t
CEA
) or at output enable access time (t
OEA
). The state of the
data input/output pins (DQ) is controlled by
CE
and
OE
. If the outputs are activated before t
AA
, the data
lines are driven to an intermediate state until t
AA
. If the address inputs are changed while
CE
and
OE
remain valid, output data will remain valid for output data hold time (t
OH
) but will then go indeterminate
until the next address access. (See Table 1.)
DATA WRITE MODE
The DS1501/DS1511 is in the write mode whenever
WE
and
CE
are in their active state. The start of a
write is referenced to the latter occurring transition of
WE
or
CE
. The addresses must be held valid
throughout the cycle.
CE
or
WE
must return inactive for a minimum of t
WR
prior to the initiation of a
subsequent read or write cycle. Data in must be valid t
DS
prior to the end of the write and remain valid for
t
DH
afterward. In a typical application, the
OE
signal will be high during a write cycle. However,
OE
can be active provided that care is taken with the data bus to avoid bus contention. If
OE
is low prior to a
high to low transition on
WE
, the data bus can become active with read data defined by the address
inputs. A low transition on
WE
will then disable the outputs t
WEZ
after
WE
goes active. (See Table 1.)
DATA RETENTION MODE
The DS1501/DS1511 is fully accessible and data can be written and read only when V
CC
is greater than
V
PF
. However, when V
CC
falls below the power-fail point V
PF
(point at which write protection occurs)
the internal clock registers and SRAM are blocked from any access. While in the data retention mode, all
inputs are don’t cares and outputs go to a high-Z state, with the possible exception of
KS
,
PWR
, SQW,
and
RST
. If V
PF
is less than V
BAT
and V
BAUX
, the device power is switched from V
CC
to the greater of
V
BAT
and V
BAUX
when V
CC
drops below V
PF
. If V
PF
is greater than V
BAT
and V
BAUX
, the device power is
switched from V
CC
to the larger of V
BAT
and V
BAUX
when V
CC
drops below the larger of V
BAT
and V
BAUX
.
RTC operation and SRAM data are maintained from the battery until V
CC
is returned to nominal levels.
(See Table 1.)
All control, data, and address signals must be no more than 0.3 volts above V
CC
.
AUXILIARY BATTERY
The V
BAUX
input is provided to supply power from an auxiliary battery for the DS1501/DS1511 kickstart
and SQW output features in the absence of V
CC
. This power source must be available in order to use
these auxiliary features when V
CC
is not applied to the device.
This auxiliary battery may be used as the primary backup power source for maintaining the
clock/calendar and extended user RAM. This occurs if the V
BAT
pin is at a lower voltage than V
BAUX
. If
the DS1501/DS1511 is to be backed-up using a single battery with the auxiliary features enabled, then
V
BAUX
should be used and V
BAT
should be grounded. If V
BAUX
is not to be used, it should be grounded.
相關(guān)PDF資料
PDF描述
DS1501 Y2K-Compliant Watchdog Real-Time Clocks
DS1511 Y2K-Compliant Watchdog Real-Time Clocks
DS1501-DS1511 Y2K-Compliant Watchdog Real-Time Clocks
DS1501YSN Hook-Up Wire; Conductor Size AWG:24; No. Strands x Strand Size:7 x 32; Jacket Color:White; Approval Bodies:UL, CSA; Approval Categories:UL AWM Styles 1007, 1565; CSA Types TR-64, TRSR-64; JQA-F; Passes VW-1 Flame Test RoHS Compliant: Yes
DS1501WEN Y2K-Compliant Watchdog Real-Time Clocks
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
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DS1501YSN/T&R 制造商:Maxim Integrated Products 功能描述:REAL TIME CLOCK PARALLEL 256BYTE 28SOIC - Tape and Reel