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參數(shù)資料
| 型號： | DS1486P-120 |
| 廠商： | Maxim Integrated Products |
| 文件頁數(shù)： | 9/14頁 |
| 文件大小： | 0K |
| 描述： | IC TIMEKEEPER RAM 1MB 34-PCM |
| 標(biāo)準(zhǔn)包裝： | 40 |
| 類型： | 時(shí)鐘/日歷 |
| 特點(diǎn)： | 警報(bào)器，閏年，NVSRAM，方波輸出，監(jiān)視計(jì)時(shí)器 |
| 存儲(chǔ)容量： | 128KB |
| 時(shí)間格式： | HH:MM:SS:hh（12/24 小時(shí)） |
| 數(shù)據(jù)格式： | YY-MM-DD-dd |
| 接口： | 并聯(lián) |
| 電源電壓： | 4.5 V ~ 5.5 V |
| 電壓 - 電源，電池： | 3.3V |
| 工作溫度： | 0°C ~ 70°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 34-PowerCap? 模塊 |
| 供應(yīng)商設(shè)備封裝： | 34-PowerCap 模塊 |
| 包裝： | 管件 |
DS1486/DS1486P
4 of 14
OPERATION—WRITE REGISTERS
The DS1486 is in the write mode whenever the
WE (Write Enable) and CE (Chip Enable) signals are in
the active (Low) state after the address inputs are stable. The latter occurring falling edge of
CE or WE
will determine the start of the write cycle. The write cycle is terminated by the earlier rising edge of
CE
or
WE. All address inputs must be kept valid throughout the write cycle. WE must return to the high state
for a minimum recovery state (tWR) before another cycle can be initiated. Data must be valid on the data
bus with sufficient Data Set-Up (tDS) and Data Hold Time (tDH) with respect to the earlier rising edge of
CE or WE. The OE control signal should be kept inactive (High) during write cycles to avoid bus
contention. However, if the output bus has been enabled (
CE and OE active), then WE will disable the
outputs in tODW from its falling edge.
DATA RETENTION
The RAMified Timekeeper provides full functional capability when VCC is greater than 4.5V. When VCC
falls below the power fail trip-point (VTP), the internal CE signal is forced high, blocking access (Write-
Protect). While in the data retention mode, all inputs are “don’t cares,” SQW and DQ0–DQ7 go to a high-
impedance state. The two interrupts
INTA and INTB (INTB) and the internal clock and timers continue
to run regardless of the level of VCC. However, it is important to insure that the pull-up resistors used with
the interrupt pins are never pulled up to a value that is greater than VCC + 0.3V. As VCC falls below
approximately 3.0V, a power switching circuit turns the internal lithium energy source on to maintain the
clock and timer data functionality. It is also required to ensure that during this time (battery-backup
mode), that the voltage present at
INTA and INTB (INTB) never exceeds VBAT. During power-up, when
VCC rises above VBAT, the power-switching circuit connects external VCC and disconnects the internal
lithium energy source. Normal operation can resume after VCC exceeds 4.5V for a period of 200ms.
RAMIFIED TIMEKEEPER REGISTERS
The RAMified timekeeper has 14 registers that are 8 bits wide that contain all the timekeeping, alarm,
watchdog, and control information. The clock, calendar, alarm, and watchdog registers are memory
locations that contain external (user-accessible) and internal copies of the data. The external copies are
independent of internal functions, except that they are updated periodically by the simultaneous transfer
of the incremented internal copy (see Figure 1). The Command Register bits are affected by both internal
and external functions. This register will be discussed later. Registers 0, 1, 2, 4, 6, 8, 9, and A contain
time-of-day and date information (see Figure 2). Time-of-day information is stored in BCD. Registers 3,
5, and 7 contain the Time-of-Day Alarm information. Time-of-Day Alarm information is stored in BCD.
Register B is the Command Register and information in this register is binary. Registers C and D are the
Watchdog Alarm Registers and information that is stored in these two registers is in BCD. Registers E
through 1FFFF are user bytes and can be used to maintain data at the user’s discretion.
CLOCK ACCURACY (DIP MODULE)
The DS1486 is guaranteed to keep time accuracy to within
±1 minute per month at +25°C.
CLOCK ACCURACY (PowerCap MODULE)
The DS1486P and DS9034PCX are each individually tested for accuracy. Once mounted together, the
module is guaranteed to keep time accuracy to within ±1.53 minutes per month (35ppm) at +25°C.
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| DS1486P-120+ | 功能描述:實(shí)時(shí)時(shí)鐘 RoHS:否 制造商:Microchip Technology 功能:Clock, Calendar. Alarm RTC 總線接口:I2C 日期格式:DW:DM:M:Y 時(shí)間格式:HH:MM:SS RTC 存儲(chǔ)容量:64 B 電源電壓-最大:5.5 V 電源電壓-最小:1.8 V 最大工作溫度:+ 85 C 最小工作溫度: 安裝風(fēng)格:Through Hole 封裝 / 箱體:PDIP-8 封裝:Tube |
| DS1486P-150 | 制造商:DALLAS 制造商全稱:Dallas Semiconductor 功能描述:RAMified Watchdog Timekeeper |
| DS1487 | 制造商:NSC 制造商全稱:National Semiconductor 功能描述:Low Power RS-485 1⁄4 Unit Load Multipoint Transceiver |
| DS1487M | 功能描述:RS-422/RS-485 接口 IC RoHS:否 制造商:Maxim Integrated 數(shù)據(jù)速率:1136 Kbps 工作電源電壓:3 V to 5.5 V 電源電流:5.9 mA 工作溫度范圍:- 40 C to + 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:SOIC-28 封裝:Tube |
| DS1487M/NOPB | 功能描述:RS-422/RS-485 接口 IC LO PR RS485/1/4 UNIT LOAD MULTIPT XCVR RoHS:否 制造商:Maxim Integrated 數(shù)據(jù)速率:1136 Kbps 工作電源電壓:3 V to 5.5 V 電源電流:5.9 mA 工作溫度范圍:- 40 C to + 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:SOIC-28 封裝:Tube |
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