參數(shù)資料
型號: DS1482S
英文描述: 1-Wire Level Shifter and Line Driver with Load Sensor
中文描述: 1線平轉(zhuǎn)換器和線路驅(qū)動器,帶有負載傳感器
文件頁數(shù): 7/7頁
文件大?。?/td> 215K
代理商: DS1482S
DS1482
UNITS
7 of 7
PARAMETER
OUTPUT PIN RXD
Output-Low Voltage
Output-High Voltage
Output Rise Time
(50pF Load)
Output Fall Time
(50pF Load)
Delay I/O to RXD
(50pF Load)
OUTPUT PIN PCTLZ
Output-Low Voltage
Output-High Voltage
Output Rise Time
(50pF Load)
Output Fall Time
(50pF Load)
Delay SPU to PCTLZ
(50pF Load)
OUTPUT PIN DONE
Output-Low Voltage
Output-High Voltage
Output Rise Time
(50pF Load)
Output Fall Time
(50pF Load)
Delay I/O to DONE
(50pF Load)
Delay START to
DONE (50pF Load)
SYMBOL
CONDITIONS
MIN
TYP
MAX
V
OL
V
OH
100μA load
-100μA load
0.4
V
V
V
CCQ
- 0.5V
t
R
0.1 x V
CCQ
to 0.9 x V
CCQ
50
ns
t
F
0.9 x V
CCQ
to 0.1 x V
CCQ
50
ns
t
IR
See Figure 6 (Note 2)
100
ns
V
OL
V
OH
100μA load
-100μA load
0.4
V
V
V
CC
- 0.5V
t
R
0.1 x V
CC
to 0.9 x V
CC
50
ns
t
F
0.9 x V
CC
to 0.1 x V
CC
50
ns
t
SP
See Figure 7 (Note 4)
100
ns
V
OL
V
OH
100μA load
-100μA load
0.4
V
V
V
CCQ
- 0.5V
t
R
0.1 x V
CCQ
to 0.9 x V
CCQ
50
ns
t
F
0.9 x V
CCQ
to 0.1 x V
CCQ
50
ns
t
CF
START at V
CCQ
(Note 5)
128
500
μs
t
SD
See Figure 8
100
ns
Note 1:
Note 2:
The input pins have a weak pulldown.
For OD read- or write-1 time slots, TXD should be pulsed high for 1.28μs. The window for
sampling RXD begins 1.8μs after TXD has turned high and ends 2.05μs after TXD has turned
high. RXD must be sampled inside this window. Correct sampling can be achieved with the
particular recommended microcontroller Hitachi SH7622 if the peripheral module operating
frequency P is higher or equal to 22MHz.
Measured either with V
CC
on the pin and TXD low or with 0V on the pin and TXD high. This
parameter is guaranteed by design, and is not production tested.
The PCTLZ signal is gated by TXD. The PCTLZ output is only low if TXD is low.
Characteristic of the glitch-eating filter on the output of the load-sensing comparator, i.e., an
event where the downstream 1-Wire slave device is sinking high current, ceases sinking the
current for less than this amount of time, and resumes sinking the current does not generate
high level on DONE; DONE goes high this amount of time after the downstream 1-Wire slave
device has ceased sinking high current.
Note 3:
Note 4:
Note 5:
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