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參數(shù)資料
| 型號： | DS14287+ |
| 廠商： | Maxim Integrated Products |
| 文件頁數(shù)： | 5/26頁 |
| 文件大小： | 0K |
| 描述： | IC RTC W/NV RAM CNTRL 24-EDIP |
| 標準包裝： | 14 |
| 類型： | 時鐘/日歷 |
| 特點： | 警報器，夏令時，閏年，NVSRAM，方波輸出 |
| 存儲容量： | 114B |
| 時間格式： | HH:MM:SS（12/24 小時） |
| 數(shù)據(jù)格式： | YY-MM-DD-dd |
| 接口： | 并聯(lián) |
| 電源電壓： | 4.5 V ~ 5.5 V |
| 電壓 - 電源，電池： | 2.5 V ~ 3.6 V |
| 工作溫度： | 0°C ~ 70°C |
| 安裝類型： | 通孔 |
| 封裝/外殼： | 24-DIP 模塊（0.600"，15.24mm） |
| 供應商設備封裝： | 24-EDIP |
| 包裝： | 管件 |
DS14285/DS14287
13 of 26
NONVOLATILE RAM
The 114 general-purpose nonvolatile RAM bytes are not dedicated to any special function within the
DS14285/DS14287. They can be used by the processor program as nonvolatile memory and are fully
available during the update cycle.
The DS14285/DS14287 can also provide additional nonvolatile RAM. This is accomplished through the
use of its internal lithium cell in the case of the DS14287 (or the energy source connected to the VBAT pin
in the case of the DS14285) and battery-backup controller to make a standard CMOS SRAM nonvolatile
during power-fail conditions. During power-fail, the DS14285/DS14287 automatically write-protects the
external SRAM and provides a VCC output sourced from the internal lithium cell. The interface between
the DS14285/DS14287 and an external SRAM is illustrated in Figure 3.
Figure 3. External SRAM Interface to the DS14285/DS14287 RTC
INTERRUPTS
The RTC plus RAM includes three separate, fully automatic sources of interrupt for a processor. The
alarm interrupt can be programmed to occur at rates from once per second to once per day. The periodic
interrupt can be selected for rates from 500 ms to 122
s. The update-ended interrupt can be used to
indicate to the program that an update cycle is complete. Each of these independent interrupt conditions is
described in greater detail in other sections of this text.
The processor program can select which interrupts, if any, are going to be used. Three bits in Register B
enable the interrupts. Writing a logic 1 to an interrupt-enable bit permits that interrupt to be initiated when
the event occurs. A 0 in an interrupt-enable bit prohibits the IRQ pin from being asserted from that
interrupt condition. If an interrupt flag is already set when an interrupt is enabled, IRQ is immediately set
at an active level, although the interrupt initiating the event may have occurred much earlier. As a result,
there are cases where the program should clear such earlier initiated interrupts before first enabling new
interrupts. When an interrupt event occurs, the relating flag bit is set to logic 1 in Register C. These flag
bits are set independent of the state of the corresponding enable bit in Register B. The flag bit can be used
in a polling mode without enabling the corresponding enable bits. The interrupt flag bit is a status bit
which software can interrogate as necessary. When a flag is set, an indication is given to software that an
interrupt event has occurred since the flag bit was last read; however, care should be taken when using the
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相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| DS14287+ | 功能描述:實時時鐘 RoHS:否 制造商:Microchip Technology 功能:Clock, Calendar. Alarm RTC 總線接口:I2C 日期格式:DW:DM:M:Y 時間格式:HH:MM:SS RTC 存儲容量:64 B 電源電壓-最大:5.5 V 電源電壓-最小:1.8 V 最大工作溫度:+ 85 C 最小工作溫度: 安裝風格:Through Hole 封裝 / 箱體:PDIP-8 封裝:Tube |
| DS1-48-0001 | 功能描述:固定電感器 DS Storage choke 3.15A RoHS:否 制造商:AVX 電感:10 uH 容差:20 % 最大直流電流:1 A 最大直流電阻:0.075 Ohms 工作溫度范圍:- 40 C to + 85 C 自諧振頻率:38 MHz Q 最小值:40 尺寸:4.45 mm W x 6.6 mm L x 2.92 mm H 屏蔽:Shielded 端接類型:SMD/SMT 封裝 / 箱體:6.6 mm x 4.45 mm |
| DS1-48-0002 | 功能描述:固定電感器 DS Storage choke 4A RoHS:否 制造商:AVX 電感:10 uH 容差:20 % 最大直流電流:1 A 最大直流電阻:0.075 Ohms 工作溫度范圍:- 40 C to + 85 C 自諧振頻率:38 MHz Q 最小值:40 尺寸:4.45 mm W x 6.6 mm L x 2.92 mm H 屏蔽:Shielded 端接類型:SMD/SMT 封裝 / 箱體:6.6 mm x 4.45 mm |
| DS1-48-0003 | 制造商:Schurter Electronic Components 功能描述: |
| DS1-48-0004 | 制造商:Schurter Electronic Components 功能描述: |
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