參數(shù)資料
型號: DS1384FP-12+
廠商: Maxim Integrated Products
文件頁數(shù): 2/18頁
文件大小: 0K
描述: IC CTRLR RTC WDOG 120NS 44-MQFP
標(biāo)準(zhǔn)包裝: 96
類型: 時(shí)鐘/日歷
特點(diǎn): 警報(bào)器,閏年,方波輸出,監(jiān)視計(jì)時(shí)器
存儲容量: 50B
時(shí)間格式: HH:MM:SS:hh(12/24 小時(shí))
數(shù)據(jù)格式: YY-MM-DD-dd
接口: 并聯(lián)
電源電壓: 4.5 V ~ 5.5 V
電壓 - 電源,電池: 2.4 V ~ 4 V
工作溫度: 0°C ~ 70°C
安裝類型: 表面貼裝
封裝/外殼: 44-QFP
供應(yīng)商設(shè)備封裝: 44-MQFP(10x10)
包裝: 托盤
DS1384
10 of 18
Bit 3: WAM (Watchdog Alarm Mask). When this bit is set to a logic 0, the Watchdog Interrupt output
will be activated. The activated state is determined by bits 1,4,5, and 6 of the Command Register. When
this bit is set to a logic 1, the Watchdog interrupt output is deactivated.
Bit 2: TDM (Time-of-Day Alarm Mask). When this bit is set to a logic 0, the Time of Day Alarm
Interrupt output will be activated. The activated state is determined by bits 0, 4, 5, and 6 of the Command
Register. When this bit is set to a logic 1, the Time of Day Alarm interrupt output is deactivated.
Bit 1: WAF (Watchdog Alarm Flag). This bit is set to a logic 1 when a watchdog alarm interrupt
occurs. This bit is read-only.
The bit is reset when any of the Watchdog Alarm registers are accessed.
When the interrupt is in the pulse mode (see bit 4 definition), this flag will be in the logic 1 state only
during the time the interrupt is active.
Bit 0: TDF (Time-of-Day Flag). This is a read-only bit. This bit is set to a logic 1 when a time of day
alarm has occurred. The time the alarm occurred can be determined by reading the Time of Day Alarm
registers. This bit is reset to a logic 0 state when any of the Time of Day Alarm registers is accessed.
When the interrupt is in the pulse mode (see bit 4 definition), this flag will be in the logic 1 state only
during the time the interrupt is active.
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