Low-Current, I2C, Serial Real-Time Clock 16 Maxim Integrated
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鍨嬭櫉锛� DS1339AD+T
寤犲晢锛� Maxim Integrated Products
鏂囦欢闋佹暩(sh霉)锛� 8/19闋�
鏂囦欢澶�?銆�?/td> 0K
鎻忚堪锛� IC RTC I2C W/ALARM 8TDFN-EP
妯�(bi膩o)婧�(zh菙n)鍖呰锛� 3,000
椤炲瀷锛� 鏅傞悩/鏃ユ
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鏁�(sh霉)鎿�(j霉)鏍煎紡锛� YY-MM-DD-dd
鎺ュ彛锛� I²C锛�2 绶氫覆鍙�
闆绘簮闆诲锛� 1.71 V ~ 5.5 V
闆诲 - 闆绘簮锛岄浕姹狅細 1.3 V ~ 3.7 V
宸ヤ綔婧害锛� -40°C ~ 85°C
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灏佽/澶栨锛� *
渚涙噳(y墨ng)鍟嗚ō(sh猫)鍌欏皝瑁濓細 *
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DS1339A
Low-Current, I2C, Serial Real-Time Clock
16
Maxim Integrated
Slave Address Byte: Each slave on the I2C bus
responds to a slave address byte sent immediately
following a START condition. The slave address byte
contains the slave address in the most significant 7
bits and the R/W bit in the least significant bit. The
whatever鈥檚 slave address is D0h and cannot be
modified by the user. When the R/W bit is 0 (such as in
D0h), the master is indicating it writes data to the slave.
If R/W = 1, (D1h in this case), the master is indicating
it wants to read from the slave. If an incorrect slave
address is written, the DS1339A assumes the master
is communicating with another I2C device and ignores
the communication until the next START condition is
sent.
Memory Address: During an I2C write operation, the
master must transmit a memory address to identify
the memory location where the slave is to store the
data. The memory address is always the second byte
transmitted during a write operation following the slave
address byte.
I2C Communication
Writing a Single Byte to a Slave: The master must
generate a START condition, write the slave address
byte (R/W = 0), write the memory address, write the byte
of data, and generate a STOP condition. Remember
the master must read the slave鈥檚 acknowledgment
during all byte write operations.
Writing Multiple Bytes to a Slave: To write multiple
bytes to a slave, the master generates a START
condition, writes the slave address byte (R/W = 0),
writes the starting memory address, writes multiple
data bytes, and generates a STOP condition.
Reading a Single Byte from a Slave: Unlike the write
operation that uses the specified memory address
byte to define where the data is to be written, the read
operation occurs at the present value of the memory
address counter. To read a single byte from the slave,
the master generates a START condition, writes the
slave address byte with R/W = 1, reads the data byte
with a NACK to indicate the end of the transfer, and
generates a STOP condition. However, since requiring
the master to keep track of the memory address
counter is impractical, the following method should
be used to perform reads from a specified memory
location.
Manipulating the Address Counter for Reads: A
dummy write cycle can be used to force the address
counter to a particular value. To do this the master
Figure 5. I2C Transactions
SLAVE
ADDRESS
START
1
0
1
0
SLAVE
ACK
SLAVE
ACK
SLAVE
ACK
R/W
MSB
LSB
MSB
LSBMSB
LSB
b7
b6
b5
b4
b3 b2 b1
b0
READ/
WRITE
REGISTER ADDRESS
b7
b6
b5
b4
b3
b2 b1 b0
DATA
STOP
SINGLE BYTE WRITE
-WRITE CONTROL REGISTER
TO B8h
MULTIBYTE WRITE
-WRITE DATE REGISTER TO "02"
AND MONTH REGISTER TO "11"
SINGLE BYTE READ
-READ CONTROL REGISTER
MULTIBYTE READ
-READ HOURS AND DAY
REGISTER VALUES
START
REPEATED
START
D1h
MASTER
NACK
STOP
11010000
00001110
0Eh
1 1010001
1 1010000
0 0001110
D0h
0Eh
STOP
VALUE
START 1101000 0
00000100
D0h
04h
DATA
MASTER
NACK
STOP
VALUE
DATA
02h
B8h
EXAMPLE I2C TRANSACTIONS
TYPICAL I2C WRITE TRANSACTION
10111000
00000010
D0h
A)
C)
B)
D)
SLAVE
ACK
SLAVE
ACK
SLAVE
ACK
SLAVE
ACK
SLAVE
ACK
SLAVE
ACK
SLAVE
ACK
REPEATED
START
D1h
MASTER
ACK
1 1010001
VALUE
DATA
SLAVE
ACK
SLAVE
ACK
SLAVE
ACK
START 1101000 0
00000010
D0h
02h
SLAVE
ACK
SLAVE
ACK
STOP
11h
00010001 SLAVE
ACK
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