參數(shù)資料
型號(hào): DS1307+
廠商: MAXIM INTEGRATED PRODUCTS INC
元件分類: XO, clock
英文描述: 64 x 8, Serial, I<sup>2</sup>C Real-Time Clock
中文描述: 1 TIMER(S), REAL TIME CLOCK, PDIP8
封裝: 0.300 INCH, ROHS COMPLIANT, PLASTIC, DIP-8
文件頁(yè)數(shù): 7/14頁(yè)
文件大?。?/td> 296K
代理商: DS1307+
DS1307 64 x 8, Serial, I
2
C Real-Time Clock
OSCILLATOR CIRCUIT
The DS1307 uses an external 32.768kHz crystal. The oscillator circuit does not require any external resistors or
capacitors to operate. Table 1 specifies several crystal parameters for the external crystal. Figure 1 shows a
functional schematic of the oscillator circuit. If using a crystal with the specified characteristics, the startup time is
usually less than one second.
CLOCK ACCURACY
The accuracy of the clock is dependent upon the accuracy of the crystal and the accuracy of the match between
the capacitive load of the oscillator circuit and the capacitive load for which the crystal was trimmed. Additional
error will be added by crystal frequency drift caused by temperature shifts. External circuit noise coupled into the
oscillator circuit may result in the clock running fast. Refer to Application Note 58:
Crystal Considerations with
Dallas Real-Time Clocks
for detailed information.
Table 1. Crystal Specifications*
PARAMETER
SYMBOL
MIN
TYP
Nominal Frequency
f
O
32.768
Series Resistance
ESR
Load Capacitance
C
L
12.5
MAX
45
UNITS
kHz
k
pF
*
The crystal, traces, and crystal input pins should be isolated from RF generating signals. Refer to
Application Note 58: Crystal Considerations for Dallas Real-Time Clocks
for additional specifications.
Figure 2. Recommended Layout for Crystal
RTC AND RAM ADDRESS MAP
Table 2 shows the address map for the DS1307 RTC and RAM registers. The RTC registers are located in address
locations 00h to 07h. The RAM registers are located in address locations 08h to 3Fh. During a multibyte access,
when the address pointer reaches 3Fh, the end of RAM space, it wraps around to location 00h, the beginning of
the clock space.
NOTE:
AVOID ROUTING SIGNAL LINES IN THE CROSSHATCHED AREA (UPPER
LEFT QUADRANT) OF THE PACKAGE UNLESS THERE IS A GROUND PLANE
BETWEEN THE SIGNAL LINE AND THE DEVICE PACKAGE.
LOCAL GROUND PLANE (LAYER 2)
CRYSTAL
X1
X2
GND
7 of 14
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