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鍙冩暩(sh霉)璩囨枡
| 鍨嬭櫉(h脿o)锛� | DS1302S/T&R |
| 寤犲晢锛� | Maxim Integrated Products |
| 鏂囦欢闋�(y猫)鏁�(sh霉)锛� | 3/13闋�(y猫) |
| 鏂囦欢澶�?銆�?/td> | 0K |
| 鎻忚堪锛� | IC TIMEKEEPER T-CHARGE 8-SOIC |
| 鐢�(ch菐n)鍝佸煿瑷�(x霉n)妯″锛� | Lead (SnPb) Finish for COTS Obsolescence Mitigation Program |
| 妯�(bi膩o)婧�(zh菙n)鍖呰锛� | 2,000 |
| 椤炲瀷锛� | 鏅�(sh铆)閻�/鏃ユ |
| 鐗归粸(di菐n)锛� | 闁忓勾锛孨VSRAM锛屾稉娴佸厖闆诲櫒 |
| 瀛樺劜(ch菙)瀹归噺锛� | 31B |
| 鏅�(sh铆)闁撴牸寮忥細 | HH:MM:SS锛�12/24 灏忔檪(sh铆)锛� |
| 鏁�(sh霉)鎿�(j霉)鏍煎紡锛� | YY-MM-DD-dd |
| 鎺ュ彛锛� | 3 绶氫覆鍙� |
| 闆绘簮闆诲锛� | 2 V ~ 5.5 V |
| 闆诲 - 闆绘簮锛岄浕姹狅細 | 2 V ~ 5.5 V |
| 宸ヤ綔婧害锛� | 0°C ~ 70°C |
| 瀹夎椤炲瀷锛� | 琛ㄩ潰璨艰 |
| 灏佽/澶栨锛� | 8-SOIC锛�0.209"锛�5.30mm 瀵級 |
| 渚涙噳(y墨ng)鍟嗚ō(sh猫)鍌欏皝瑁濓細 | 8-SO |
| 鍖呰锛� | 甯跺嵎 (TR) |
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DS1302 Trickle-Charge Timekeeping Chip
11 of 13
CAPACITANCE
(TA = +25掳C)
PARAMETER
SYMBOL
MIN
TYP
MAX
UNITS
Input Capacitance
CI
10
pF
I/O Capacitance
CI/O
15
pF
AC ELECTRICAL CHARACTERISTICS
(TA = 0掳C to +70掳C or TA = -40掳C to +85掳C.) (Note 1)
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
VCC = 2.0V
200
Data to CLK Setup
tDC
VCC = 5V
(Note 6)
50
ns
VCC = 2.0V
280
CLK to Data Hold
tCDH
VCC = 5V
(Note 6)
70
ns
VCC = 2.0V
800
CLK to Data Delay
tCDD
VCC = 5V
(Notes 6, 7, 8)
200
ns
VCC = 2.0V
1000
CLK Low Time
tCL
VCC = 5V
(Note 6)
250
ns
VCC = 2.0V
1000
CLK High Time
tCH
VCC = 5V
(Note 6)
250
ns
VCC = 2.0V
0.5
CLK Frequency
tCLK
VCC = 5V
(Note 6)
DC
2.0
MHz
VCC = 2.0V
2000
CLK Rise and Fall
tR, tF
VCC = 5V
500
ns
VCC = 2.0V
4
CE to CLK Setup
tCC
VCC = 5V
(Note 6)
1
渭s
VCC = 2.0V
240
CLK to CE Hold
tCCH
VCC = 5V
(Note 6)
60
ns
VCC = 2.0V
4
CE Inactive Time
tCWH
VCC = 5V
(Note 6)
1
渭s
VCC = 2.0V
280
CE to I/O High Impedance
tCDZ
VCC = 5V
(Note 6)
70
ns
VCC = 2.0V
280
SCLK to I/O High Impedance
tCCZ
VCC = 5V
(Note 6)
70
ns
Note 1:
Limits at -40掳C are guaranteed by design and are not production tested.
Note 2:
All voltages are referenced to ground.
Note 3:
ICC1T and ICC2T are specified with I/O open, CE and SCLK set to a logic 0.
Note 4:
ICC1A and ICC2A are specified with the I/O pin open, CE high, SCLK = 2MHz at VCC = 5V; SCLK = 500kHz, VCC = 2.0V.
Note 5:
CE, SCLK, and I/O all have 40k
惟 pulldown resistors to ground.
Note 6:
Measured at VIH = 2.0V or VIL = 0.8V and 10ns maximum rise and fall time.
Note 7:
Measured at VOH = 2.4V or VOL = 0.4V.
Note 8:
Load capacitance = 50pF.
Note 9:
ICC1S and ICC2S are specified with CE, I/O, and SCLK open.
Note 10:
VCC = VCC2, when VCC2 > VCC1 + 0.2V; VCC = VCC1, when VCC1 > VCC2.
Note 11:
VCC2 = 0V.
Note 12:
VCC1 = 0V.
Note 13:
Typical values are at +25掳C.
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鐩搁棞(gu膩n)浠ｇ悊鍟�/鎶€琛�(sh霉)鍙冩暩(sh霉) |
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| DS1302Z | 鍔熻兘鎻忚堪:瀵�(sh铆)鏅�(sh铆)鏅�(sh铆)閻� Trickle-Charge Timekeeping Chip RoHS:鍚� 鍒堕€犲晢:Microchip Technology 鍔熻兘:Clock, Calendar. Alarm RTC 绺界窔鎺ュ彛:I2C 鏃ユ湡鏍煎紡:DW:DM:M:Y 鏅�(sh铆)闁撴牸寮�:HH:MM:SS RTC 瀛樺劜(ch菙)瀹归噺:64 B 闆绘簮闆诲-鏈€澶�:5.5 V 闆绘簮闆诲-鏈€灏�:1.8 V 鏈€澶у伐浣滄韩搴�:+ 85 C 鏈€灏忓伐浣滄韩搴�: 瀹夎棰�(f膿ng)鏍�:Through Hole 灏佽 / 绠遍珨:PDIP-8 灏佽:Tube |
| DS1302Z/T&R | 鍒堕€犲晢:Maxim Integrated Products 鍔熻兘鎻忚堪:IC TIMEKEEPER T-CHARGE 8-SOIC 鍒堕€犲晢:Maxim Integrated Products 鍔熻兘鎻忚堪:IC RTC YY-MM-DD 31 X 8 SOIC-8 鍒堕€犲晢:Maxim Integrated Products 鍔熻兘鎻忚堪:IC, RTC, YY-MM-DD, 31 X 8, SOIC-8 |
| DS1302Z/T&R+ | 鍒堕€犲晢:Maxim Integrated Products 鍔熻兘鎻忚堪:REAL TIME CLOCK SERL 31BYTE 8SOIC - Tape and Reel |
| DS1302Z/T&R | 鍔熻兘鎻忚堪:瀵�(sh铆)鏅�(sh铆)鏅�(sh铆)閻� Trickle-Charge Timekeeping Chip RoHS:鍚� 鍒堕€犲晢:Microchip Technology 鍔熻兘:Clock, Calendar. Alarm RTC 绺界窔鎺ュ彛:I2C 鏃ユ湡鏍煎紡:DW:DM:M:Y 鏅�(sh铆)闁撴牸寮�:HH:MM:SS RTC 瀛樺劜(ch菙)瀹归噺:64 B 闆绘簮闆诲-鏈€澶�:5.5 V 闆绘簮闆诲-鏈€灏�:1.8 V 鏈€澶у伐浣滄韩搴�:+ 85 C 鏈€灏忓伐浣滄韩搴�: 瀹夎棰�(f膿ng)鏍�:Through Hole 灏佽 / 绠遍珨:PDIP-8 灏佽:Tube |
| DS1302Z/T&R/C06 | 鍔熻兘鎻忚堪:瀵�(sh铆)鏅�(sh铆)鏅�(sh铆)閻� Trickle-Charge Timekeeping Chip RoHS:鍚� 鍒堕€犲晢:Microchip Technology 鍔熻兘:Clock, Calendar. Alarm RTC 绺界窔鎺ュ彛:I2C 鏃ユ湡鏍煎紡:DW:DM:M:Y 鏅�(sh铆)闁撴牸寮�:HH:MM:SS RTC 瀛樺劜(ch菙)瀹归噺:64 B 闆绘簮闆诲-鏈€澶�:5.5 V 闆绘簮闆诲-鏈€灏�:1.8 V 鏈€澶у伐浣滄韩搴�:+ 85 C 鏈€灏忓伐浣滄韩搴�: 瀹夎棰�(f膿ng)鏍�:Through Hole 灏佽 / 绠遍珨:PDIP-8 灏佽:Tube |
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