參數(shù)資料
型號(hào)： DS12887
英文描述： Real Time Clock
中文描述： 實(shí)時(shí)時(shí)鐘
文件頁(yè)數(shù)： 10/19頁(yè)
文件大?。?/td> 584K
代理商： DS12887
DS12887
10 of 19
REGISTER B
MSB
BIT 7
SET
LSB
BIT 0
DSE
BIT 6
PIE
BIT 5
AIE
BIT 4
UIE
BIT 3
SQWE
BIT 2
DM
BIT 1
24/12
SET
When the SET bit is a 0, the update transfer functions normally by advancing the counts once per second.
When the SET bit is written to a 1, any update transfer is inhibited and the program can initialize the time
and calendar bytes without an update occurring in the midst of initializing. Read cycles can be executed
in a similar manner. SET is a read/write bit that is not modified by
RESET
or internal functions of the
DS12887.
PIE
The periodic interrupt enable PIE bit is a read/write bit which allows the Periodic Interrupt Flag (PF) bit
in Register C to drive the
IRQ
pin low. When the PIE bit is set to 1, periodic interrupts are generated by
driving the
IRQ
pin low at a rate specified by the RS3–RS0 bits of Register A. A 0 in the PIE bit blocks
the
IRQ
output from being driven by a periodic interrupt, but the Periodic Flag (PF) bit is still set at the
periodic rate. PIE is not modified by any internal DS12887 functions, but is cleared to 0 on
RESET
.
AIE
The Alarm Interrupt Enable (AIE) bit is a read/write bit which, when set to a 1, permits the Alarm Flag
(AF) bit in Register C to assert
IRQ
. An alarm interrupt occurs for each second that the three time bytes
equal the three alarm bytes including a “don’t care” alarm code of binary 11XXXXXX. When the AIE bit
is set to 0, the AF bit does not initiate the
IRQ
signal. The
RESET
pin clears AIE to 0. The internal
functions of the DS12887 do not affect the AIE bit.
UIE
The Update Ended Interrupt Enable (UIE) bit is a read/ write that enables the Update End Flag (UF) bit in
Register C to assert
IRQ
. The
RESET
pin going low or the SET bit going high clears to UIE bit.
SQWE
When the Square Wave Enable (SQWE) bit is set to a 1, a square wave signal at the frequency set by the
rate–selection bits RS3 through RS0 is driven out on a SQW pin. When the SQWE bit is set to z0, the
SQW pin is held low; the state of SQWE is cleared by the
RESET
pin. SQWE is a read/write bit.
DM
The Data Mode (DM) bit indicates whether time and calendar information is in binary or BCD format.
The DM bit is set by the program to the appropriate format and can be read as required. This bit is not
modified by internal functions or
RESET
. A 1 in DM signifies binary data while a 0 in DM specifies
Binary Coded Decimal (BCD) data.
24/12
The 24/12 control bit establishes the format of the hours byte. A 1 indicates the 24–hour mode and a 0
indicates the 12–hour mode. This bit is read/write and is not affected by internal functions of
RESET
.
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