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參數(shù)資料
| 型號： | DS1254Y |
| 廠商： | DALLAS SEMICONDUCTOR |
| 元件分類： | Timer or RTC |
| 英文描述： | 0 TIMER(S), REAL TIME CLOCK, PBGA168 |
| 封裝： | BGA-168 |
| 文件頁數(shù)： | 12/17頁 |
| 文件大?。?/td> | 161K |
| 代理商： | DS1254Y |
DS1254
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Pattern recognition continues for a total of 64 write cycles as described above until all the bits in the
comparison register have been matched (this bit pattern is shown in Figure 2). With a correct match for
64-bits, the Phantom Clock is enabled and data transfer to or from the timekeeping registers can proceed.
The next 64 cycles will cause the Phantom Clock to either receive or transmit data on DQ0, depending on
the level of the OE pin or the
WE
pin. Cycles to other locations outside the memory block can be
interleaved with CE cycles without interrupting the pattern recognition sequence or data transfer
sequence to the Phantom Clock.
PHANTOM CLOCK REGISTER INFORMATION
The Phantom Clock information is contained in eight registers of 8-bits, each of which is sequentially
accessed one bit at a time after the 64-bit pattern recognition sequence has been completed.
When
updating the Phantom Clock registers, each register must be handled in groups of 8-bits. Writing and
reading individual bits within a register could produce erroneous results. These read/write registers are
defined in Figure 3.
PHANTOM CLOCK PROTOCOL DEFINTION Figure 2
NOTE:
The pattern recognition in Hex is C5, 3A, A3, 5C, C5, 3A, A3, 5C. The odds of this pattern being
accidentally duplicate and causing inadvertent entry to the Phantom Clock is less than 1 in 10
19. This
pattern is sent to the Phantom Clock LSB to MSB.
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