
DS1234
Conditional Nonvolatile Controller Chip
DS1234
021798 1/7
FEATURES
Converts CMOS static RAMs into nonvolatile
memories
Software-controlled write inhibit
Software-controlled battery disconnect extends
battery life
Unconditionally write protects when V
CC
is out of
tolerance
Consumes less than 100 nA of battery current
Power fail signal can be used to interrupt processor on
power failure
Low forward voltage drop on the V
CC
switch
Optional 16-pin SOIC surface mount package
PIN ASSIGNMENT
GND
VCCI
VBAT
NC
A3
A2
A1
A0
WEO
CEO
NC
CEI
NC
VCCO
VCCI
VBAT
VCCO
DS1234 14-Pin DIP (300 MIL)
See Mech. Drawings
Section
DS1234S 16-Pin SOIC (300 MIL)
See Mech. Drawings
Section
PF
WEI
A3
A1
A0
PF
A2
GND
WEO
CEO
NC
CEI
WEI
1
2
3
4
5
6
7
14
13
12
11
10
9
8
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
PIN DESCRIPTION
V
CCO
NC
CEI
WEI
CEO
WEO
GND
PF
A0-A3
V
BAT
V
CCI
– RAM Supply
– No Connection
– Chip Enable Input
– Write Enable Input
– Chip Enable Output to RAM
– Write Enable Output to RAM
– Ground
– Power Fail Output
– Address Inputs
– Battery Input
– +5V Supply
DESCRIPTION
The DS1234 is a CMOS circuit that converts CMOS
RAM into nonvolatile memory and adds two software
selectable switches. Incoming power is monitored for
an out-of-tolerance condition. When such a condition is
detected, chip enable and write enable to the RAM are
inhibited to accomplish write protection, and the battery
is switched on to supply the memory with uninterrupted
power. The two software selectable switches provided
by the DS1234 are capable of inhibiting both the write
enable to the RAM and the battery backup circuitry by a
pattern recognition sequence across four address lines.
Inhibiting the write enable to the nonvolatile RAM pro-
vides data integrity by isolating the memory contents
from external change. The second switch provides add-
ed flexibility and increases battery life to the system by
enabling/disabling the battery for shipment or storage,
or when battery backup is not needed.