參數(shù)資料
型號(hào)： DS1222
英文描述： Low-Noise, High-Speed, 16-Bit Accurate CMOS Operational Amplifier 10-MSOP -40 to 125
中文描述： 開(kāi)關(guān)陣列芯片
文件頁(yè)數(shù)： 2/4頁(yè)
文件大?。?/td> 46K
代理商： DS1222
DS1222
2 of 4
OPERATION - BANK SWITCHING
Initially, on power-up all four bank select outputs are low and the chip enable output (
CEO
) is held high.
(Note: the power fail input [
I
P
] must be low prior to power-up to assure proper initialization.) Bank
switching is achieved by matching a predefined pattern stored within the DS1222 with a 16-bit sequence
received on four address inputs. Prior to entering the 16-bit pattern, which sets the bank switch, a read
cycle of 1111 on address inputs AW through AZ should be executed to guarantee that pattern entry starts
with bit 0. Each set of address inputs is clocked into the DS1222 when
CEI
is driven low. All 16 inputs
must be consecutive read cycles. The first eleven cycles must match the exact bit pattern as shown in
Table 1. The last five cycles must match the exact bit pattern as shown for addresses AX, AY, and AZ.
However, address line AW defines the bank number to be enabled as per Table 2.
Switching to a selected bank of memory occurs on the rising edge of
CEI
when the last set of bits is input
and a match has been established. After bank selection
CEO
always follows
CEI
with a maximum
propagation delay of 15 ns. The bank selected is determined by the levels set on Bank Select 1 through
Bank Select 4 as per Table 2. These levels are held constant for all memory cycles until a new memory
bank is selected.
ADDRESS BIT SEQUENCE
Table 1
BIT SEQUENCE
ADDRESS
INPUTS
A
W
A
X
A
Y
A
Z
0
1
0
1
0
1
0
1
0
1
2
1
0
1
0
3
0
1
0
1
4
0
1
0
1
5
0
1
0
1
6
1
0
1
0
7
1
0
1
0
8
0
1
0
1
9
1
0
1
0
10
0
1
0
1
11
x
0
1
0
12
x
0
1
0
13
x
0
1
0
14
x
1
0
1
15
x
1
0
1
X See Table 2
BANK SELECT CONTROL
Table 2
Bank
Selected
11
*Banks Off
0
Bank 0
1
Bank 1
1
Bank 2
1
Bank 3
1
Bank 4
1
Bank 5
1
Bank 6
1
Bank 7
1
Bank 8
1
Bank 9
1
Bank 10
1
Bank 11
1
Bank 12
1
Bank 13
1
Bank 14
1
Bank 15
1
*
CEO
=V
IH
independent of
CEI
A
W
Bit Sequence
12
X
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
Outputs
BS1
Low
Low
High
Low
High
Low
High
Low
High
Low
High
Low
High
Low
High
Low
High
13
X
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
14
X
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
15
X
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
BS2
Low
Low
Low
High
High
Low
Low
High
High
Low
Low
High
High
Low
Low
High
High
BS3
Low
Low
Low
Low
Low
High
High
High
High
Low
Low
Low
Low
Low
High
High
High
BS4
Low
Low
Low
Low
Low
Low
Low
Low
Low
High
High
High
High
High
High
High
High
相關(guān)PDF資料
PDF描述
DS1227 KickStarter Chip
DS1227S KickStarter Chip
DS1228 Low-Noise, High-Speed, 16-Bit Accurate CMOS Operational Amplifier 8-SOIC -40 to 125
DS1230W-100 3.3V 256k Nonvolatile SRAM
DS1233-10 5V EconoReset
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
DS1222+ 功能描述:IC BANKSWITCH CMOS 14-DIP RoHS:是 類(lèi)別:集成電路 (IC) >> 存儲(chǔ)器 - 控制器 系列:- 標(biāo)準(zhǔn)包裝:45 系列:- 控制器類(lèi)型:靜態(tài) RAM（SRAM） 電源電壓:4.5 V ~ 5.5 V 工作溫度:0°C ~ 70°C 封裝/外殼:16-SOIC（0.295"，7.50mm 寬） 供應(yīng)商設(shè)備封裝:16-SOIC W 包裝:管件
DS1222N 功能描述:IC BANKSWITCH CMOS IND 14-DIP RoHS:否 類(lèi)別:集成電路 (IC) >> 存儲(chǔ)器 - 控制器 系列:- 標(biāo)準(zhǔn)包裝:45 系列:- 控制器類(lèi)型:靜態(tài) RAM（SRAM） 電源電壓:4.5 V ~ 5.5 V 工作溫度:0°C ~ 70°C 封裝/外殼:16-SOIC（0.295"，7.50mm 寬） 供應(yīng)商設(shè)備封裝:16-SOIC W 包裝:管件
DS1222S 功能描述:電源開(kāi)關(guān) IC - 配電 RoHS:否 制造商:Exar 輸出端數(shù)量:1 開(kāi)啟電阻（最大值）:85 mOhms 開(kāi)啟時(shí)間（最大值）:400 us 關(guān)閉時(shí)間（最大值）:20 us 工作電源電壓:3.2 V to 6.5 V 電源電流（最大值）: 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:SOT-23-5
DS1222S+ 功能描述:IC BANKSWITCH CMOS 16-SOIC RoHS:是 類(lèi)別:集成電路 (IC) >> 存儲(chǔ)器 - 控制器 系列:- 標(biāo)準(zhǔn)包裝:45 系列:- 控制器類(lèi)型:靜態(tài) RAM（SRAM） 電源電壓:4.5 V ~ 5.5 V 工作溫度:0°C ~ 70°C 封裝/外殼:16-SOIC（0.295"，7.50mm 寬） 供應(yīng)商設(shè)備封裝:16-SOIC W 包裝:管件
DS1222SN 制造商:未知廠家 制造商全稱(chēng):未知廠家 功能描述:
發(fā)布緊急采購(gòu)，3分鐘左右您將得到回復(fù)。

采購(gòu)需求

(若只采購(gòu)一條型號(hào)，填寫(xiě)一行即可)

發(fā)布成功！您可以繼續(xù)發(fā)布采購(gòu)。也可以進(jìn)入我的后臺(tái)，查看報(bào)價(jià)

發(fā)布成功！您可以繼續(xù)發(fā)布采購(gòu)。也可以進(jìn)入我的后臺(tái)，查看報(bào)價(jià)

*型號(hào) *數(shù)量 廠商 批號(hào) 封裝
添加更多采購(gòu)

我的聯(lián)系方式

*
*
*