- 鎮ㄧ従(xi脿n)鍦ㄧ殑浣嶇疆锛�璨疯常IC缍�(w菐ng) > PDF鐩寗9304 > DS1135LZ-25+ (Maxim Integrated Products)IC DELAY LINE 25NS 8-SOIC PDF璩囨枡涓嬭級
鍙冩暩(sh霉)璩囨枡
| 鍨嬭櫉(h脿o)锛� | DS1135LZ-25+ |
| 寤犲晢锛� | Maxim Integrated Products |
| 鏂囦欢闋佹暩(sh霉)锛� | 2/7闋� |
| 鏂囦欢澶у皬锛� | 0K |
| 鎻忚堪锛� | IC DELAY LINE 25NS 8-SOIC |
| 鐢�(ch菐n)鍝佸煿瑷�(x霉n)妯″锛� | Lead (SnPb) Finish for COTS Obsolescence Mitigation Program |
| 妯�(bi膩o)婧�(zh菙n)鍖呰锛� | 100 |
| 鍔熻兘锛� | 澶氬€�(g猫)锛屼笉鍙法绋� |
| 寤堕伈鍒扮涓€鎶介牠锛� | 25ns |
| 鍙敤鐨勭附寤堕伈锛� | 25ns |
| 鐛�(d煤)绔嬪欢閬叉暩(sh霉)锛� | 3 |
| 闆绘簮闆诲锛� | 2.7 V ~ 3.6 V |
| 宸ヤ綔婧害锛� | -40°C ~ 85°C |
| 瀹夎椤炲瀷锛� | 琛ㄩ潰璨艰 |
| 灏佽/澶栨锛� | 8-SOIC锛�0.154"锛�3.90mm 瀵級 |
| 渚涙噳(y墨ng)鍟嗚ō(sh猫)鍌欏皝瑁濓細 | 8-SOIC |
| 鍖呰锛� | 绠′欢 |
| 鐢�(ch菐n)鍝佺洰閷勯爜闈細 | 1436 (CN2011-ZH PDF) |
DS1135L
2 of 7
LOGIC DIAGRAM Figure 1
PART NUMBER DELAY TABLE (tPLH, tPHL) Table 1
PART NUMBER
DELAY PER
OUTPUT
(ns)
INITIAL
TOLERANCE
(Note 1)
TOLERANCE OVER
TEMP AND VOLTAGE
(Note 2)
0掳C to +70掳C
-40掳C to +85掳C
DS1135LZ-10+
10/10/10
卤
1.0ns
卤2
.0ns
卤3.0
ns
DS1135LZ-12+
12/12/12
卤
1.0ns
卤2
.0ns
卤3.0
ns
DS1135LZ-15+
15/15/15
卤
1.0ns
卤2
.5ns
卤4.0
ns
DS1135LZ-20+
20/20/20
卤
1.0ns
卤2
.5ns
卤4.0
ns
DS1135LZ-25+
25/25/25
卤
1.5ns
卤3.0
ns
卤5.0
ns
DS1135LZ-30+
30/30/30
卤
1.5ns
卤
3.0ns
卤5.0
ns
+Denotes a lead(Pb)-free/RoHS-compliant package.
NOTES:
1. Nominal conditions are +25掳C and VCC = +3.3V.
2. Voltage range of 2.7V to 3.6V.
3. Delay accuracies are for both leading and trailing edges.
TEST SETUP DESCRIPTION
Figure 2 illustrates the hardware configuration used for measuring the timing parameters of the DS1135L.
The input waveform is produced by a precision pulse generator under software control. Time delays are
measured by a time interval counter (20 ps resolution) connected to the output. The DS1135L output taps
are selected and connected to the interval counter by a VHF switch control unit. All measurements are
fully automated with each instrument controlled by the computer over an IEEE 488 bus.
TIME DELAY
OUT
IN
ONE OF THREE
鐩搁棞(gu膩n)PDF璩囨枡 |
PDF鎻忚堪 |
|---|---|
| DS1110E-150+ | IC DELAY LINE 10TAP 14-TSSOP |
| VE-2WK-MX-B1 | CONVERTER MOD DC/DC 40V 75W |
| DS1100LU-30+ | IC DELAY LINE 5TAP 30NS 8-USOP |
| AD5162BRM100-RL7 | IC DGTL POT DUAL 256POS 10-MSOP |
| DS1100LZ-25+ | IC DELAY LINE 5TAP 25NS 8-SOIC |
鐩搁棞(gu膩n)浠ｇ悊鍟�/鎶€琛�(sh霉)鍙冩暩(sh霉) |
鍙冩暩(sh霉)鎻忚堪 |
|---|---|
| DS1135LZ-25/T&R | 鍔熻兘鎻忚堪:寤堕伈绶�/瑷�(j矛)鏅�(sh铆)鍏冪礌 RoHS:鍚� 鍒堕€犲晢:Micrel 鍔熻兘:Active Programmable Delay Line 鍌虫挱寤堕伈鏅�(sh铆)闁�:1000 ps 宸ヤ綔婧害鑼冨湇: 灏佽 / 绠遍珨:QFN-24 灏佽:Tube |
| DS1135LZ-25+ | 鍔熻兘鎻忚堪:寤堕伈绶�/瑷�(j矛)鏅�(sh铆)鍏冪礌 3V 3-In-1 High-Speed Silicon Delay Line RoHS:鍚� 鍒堕€犲晢:Micrel 鍔熻兘:Active Programmable Delay Line 鍌虫挱寤堕伈鏅�(sh铆)闁�:1000 ps 宸ヤ綔婧害鑼冨湇: 灏佽 / 绠遍珨:QFN-24 灏佽:Tube |
| DS1135LZ-25+T&R | 鍒堕€犲晢:Maxim Integrated Products 鍔熻兘鎻忚堪:ACTV MULTIPLE DLY LINE 3-IN 25NS MAX 8SOIC N - Tape and Reel 鍒堕€犲晢:Maxim Integrated Products 鍔熻兘鎻忚堪:IC DELAY LINE 25NS 8SOIC |
| DS1135LZ-25+T&R | 鍔熻兘鎻忚堪:寤堕伈绶�/瑷�(j矛)鏅�(sh铆)鍏冪礌 3V 3-In-1 High-Speed Silicon Delay Line RoHS:鍚� 鍒堕€犲晢:Micrel 鍔熻兘:Active Programmable Delay Line 鍌虫挱寤堕伈鏅�(sh铆)闁�:1000 ps 宸ヤ綔婧害鑼冨湇: 灏佽 / 绠遍珨:QFN-24 灏佽:Tube |
| DS1135LZ2510 | 鍒堕€犲晢:DALLAS 鍒堕€犲晢鍏ㄧū:Dallas Semiconductor 鍔熻兘鎻忚堪:3V 3-in-1 High-Speed Silicon Delay Line |
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