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參數(shù)資料
| 型號： | DS1100L |
| 英文描述： | 3.3V 5-Tap Economy Timing Element Delay Line |
| 中文描述： | 3V、5抽頭、經(jīng)濟型定時單元(延遲線) |
| 文件頁數(shù)： | 3/6頁 |
| 文件大?。?/td> | 156K |
| 代理商： | DS1100L |
DS1100L
3 of 6
ABSOLUTE MAXIMUM RATINGS*
Voltage on Any Pin Relative to Ground
Operating Temperature Range
Storage Temperature Range
Soldering Temperature
Short-Circuit Output Current
-0.5V to +6.0V
-40°C to +85°C
-55°C to +125°C
See IPC/JEDEC J-STD-020A Specification
50mA for 1 second
*
This is a stress rating only and functional operation of the device at these or any other conditions above
those indicated in the operation sections of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods of time may affect reliability.
DC ELECTRICAL CHARACTERISTICS
(V
CC
= 3.0V to 3.6V; T
A
= -40°C to +85°C.)
TEST CONDITION
MIN
TYP
3.0
PARAMETER
Supply Voltage
High-Level
Input Voltage
Low-Level
Input Voltage
Input-Leakage
Current
Active Current
High-Level
Output Current
Low-Level
Output Current
SYM
V
CC
MAX
3.6
V
CC
+
0.3
UNITS
V
NOTES
5
3.3
V
IH
2.0
V
5
V
IL
-0.3
0.8
V
5
I
I
0.0V V
I
V
CC
-1.0
1.0
μ
A
I
CC
V
CC
= Max; Freq. = 1MHz
10
mA
6, 8
I
OH
V
CC
= Min. V
OH
= 2.3
-1
mA
I
OL
V
CC
= Min. V
OL
= 0.5
8
mA
AC ELECTRICAL CHARACTERISTICS
(V
CC
= 3.0V to 3.6V; T
A
= -40°C to +85°C.)
TEST CONDITION
MIN
TYP
20% of
Tap 5
t
PLH
+25°C 3.3V
-2
Table 1
0°C to +70°C
-3
Table 1
-40°C to +85°C
-4
Table 1
+25°C 3.3V
-5
Table 1
0°C to +70°C
-8
Table 1
-40°C to +85°C
-13
Table 1
PARAMETER
SYM
MAX
UNITS
NOTES
Input
Pulse Width
t
WI
ns
9
+2
+3
+4
+5
+8
+13
ns
ns
ns
%
%
%
1, 3, 4, 7
1, 2, 3, 4, 7
1, 2, 3, 4, 7
1, 3, 4, 7
1, 2, 3, 4, 7
1, 2, 3, 4, 7
Input-to-Tap
Delay Tolerance
(Delays 40ns)
Input-to-Tap
Delay Tolerance
(Delays > 40ns)
Output Rise or
Fall Time
Power-Up Time
Input Period
t
PLH,
t
PHL
t
PLH,
t
PHL
t
OF
, t
OR
2.0
2.5
ns
t
PU
200
μ
s
ns
Period
2(t
WI
)
9
CAPACITANCE
(T
A
= +25°C)
PARAMETER
SYMBOL
MIN
Input Capacitance
C
IN
TYP
5
MAX
10
UNITS
pF
NOTES
相關PDF資料 |
PDF描述 |
|---|---|
| DS1100L-150 | 3.3V 5-Tap Economy Timing Element Delay Line |
| DS1100L-175 | 3.3V 5-Tap Economy Timing Element Delay Line |
| DS1100L-20 | 3.3V 5-Tap Economy Timing Element Delay Line |
| DS1100L-200 | 3.3V 5-Tap Economy Timing Element Delay Line |
| DS1100L-25 | 3.3V 5-Tap Economy Timing Element Delay Line |
相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| DS1100L_11 | 制造商:MAXIM 制造商全稱:Maxim Integrated Products 功能描述:3.3V 5-Tap Economy Timing Element (Delay Line) Low-Power CMOS |
| DS1100L_1110 | 制造商:MAXIM 制造商全稱:Maxim Integrated Products 功能描述:3.3V 5-Tap Economy Timing Element (Delay Line) |
| DS1100L-100 | 制造商:DALLAS 制造商全稱:Dallas Semiconductor 功能描述:3.3V 5-Tap Economy Timing Element Delay Line |
| DS1100L-125 | 制造商:DALLAS 制造商全稱:Dallas Semiconductor 功能描述:3.3V 5-Tap Economy Timing Element Delay Line |
| DS1100L-150 | 制造商:DALLAS 制造商全稱:Dallas Semiconductor 功能描述:3.3V 5-Tap Economy Timing Element Delay Line |
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