參數(shù)資料
型號(hào)： DS1013H-80
廠商： MAXIM INTEGRATED PRODUCTS INC
元件分類： Delay Line
英文描述： SILICON DELAY LINE, TRUE OUTPUT, PDIP8
封裝： 0.300 INCH, PLASTIC, MS-001AB, DIP-8
文件頁(yè)數(shù)： 19/23頁(yè)
文件大?。?/td> 5292K
代理商： DS1013H-80
DS1013
5 of 6
NOTES:
1. All voltages are referenced to ground.
2. Measured with outputs open.
3. VCC = 5V @ 25°C. Delays accurate on both rising and falling edges within ±2 ns for -10 to -60, ±3%
for -70 to 100 and ±5% for -150 and longer delays.
4. See “Test Conditions” section.
5. The combination of temperature variations from 25°C to 0°C or 25°C to 70°C and voltage variations
from 5.0V to 4.75V or 5.0V to 5.25V may produce an additional delay shift of ±1.5 ns or ±3%,
whichever is greater.
6. All output delays tend to vary unidirectionally over temperature or voltage ranges (i.e., if OUT 1
slows down, all other outputs also slow down).
7. Period specifications may be exceeded; however, accuracy will be application-sensitive (decoupling,
layout, etc.).
TERMINOLOGY
Period: The time elapsed between the leading edge of the first pulse and the leading edge of the
following pulse.
tWI (Pulse Width): The elapsed time on the pulse between the 1.5V point on the leading edge and the
1.5V point on the trailing edge, or the 1.5V point on the trailing edge and the 1.5V point on the leading
edge.
tRISE (Input Rise Time): The elapsed time between the 20% and the 80% point on the leading edge of the
input pulse.
tFALL (Input Fall Time): The elapsed time between the 80% and the 20% point on the trailing edge of the
input pulse.
tPLH (Time Delay, Rising): The elapsed time between the 1.5V point on the leading edge of the input
pulse and the 1.5V point on the leading edge of any tap output pulse.
tPHL (Time Delay, Falling): The elapsed time between the 1.5V point on the trailing edge of the input
pulse and the 1.5V point on the trailing edge of any tap output pulse.
相關(guān)PDF資料
PDF描述
DS1013K-45 SILICON DELAY LINE, TRUE OUTPUT, PDIP14
DS1013H-20 SILICON DELAY LINE, TRUE OUTPUT, PDIP8
DS1020-50 SILICON DELAY LINE, TRUE OUTPUT, PDIP16
DS1020S-15 SILICON DELAY LINE, TRUE OUTPUT, PDSO16
DS1020S-25 SILICON DELAY LINE, TRUE OUTPUT, PDSO16
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
DS1013H-90 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Tapped Delay Line
DS1013K10 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Logic IC
DS1013K100 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Logic IC
DS1013K-100 功能描述:延遲線/計(jì)時(shí)元素 RoHS:否 制造商:Micrel 功能:Active Programmable Delay Line 傳播延遲時(shí)間:1000 ps 工作溫度范圍: 封裝 / 箱體:QFN-24 封裝:Tube
DS1013K12 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Logic IC
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